1 /*******************************************************************************
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
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7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
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13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  *
21  * Copyright 2014 QLogic Corporation
22  * The contents of this file are subject to the terms of the
23  * QLogic End User License (the "License").
24  * You may not use this file except in compliance with the License.
25  *
26  * You can obtain a copy of the License at
27  * http://www.qlogic.com/Resources/Documents/DriverDownloadHelp/
28  * QLogic_End_User_Software_License.txt
29  * See the License for the specific language governing permissions
30  * and limitations under the License.
31  *
32  *
33  * Module Description:
34  *  This file defines the IDLE_CHK macros
35  *
36  * History:
37  *    11/02/08 Miri Shitrit    Inception.
38  ******************************************************************************/
39 
40 #ifndef _LM_DEBUG_H
41 #define _LM_DEBUG_H
42 
43 // bits must be corralted to the values in idle_chk.csv
44 #define IDLE_CHK_CHIP_MASK_57710     0x01
45 #define IDLE_CHK_CHIP_MASK_57711     0x02
46 #define IDLE_CHK_CHIP_MASK_57731     0x04
47 // Added for E3
48 #define IDLE_CHK_CHIP_MASK_57773     0x08
49 #define IDLE_CHK_CHIP_MASK_57773_B0  0x10
50 
51 enum {
52     IDLE_CHK_ERROR = 1,
53     IDLE_CHK_ERROR_NO_TRAFFIC, // indicates an error if test is not under traffic
54     IDLE_CHK_WARNING
55 } idle_chk_error_level;
56 
57 #if _MSC_VER
58 #if defined(_VBD_)
59 #include <ntddk.h>
60 #include <ntstrsafe.h>
61 #define snprintf RtlStringCchPrintfA
62 #define SNPRINTF_VAR(_str) sizeof(_str),
63 #else
64 #include "vc_os_emul.h"
65 #define SNPRINTF_VAR(_str) sizeof(_str), //needed due to change of sprintf_s to fix warnings
66 #endif // !NTDDI_VERSION
67 
68 
69 #else // !_MSC_VER
70 #define SNPRINTF_VAR(_str) sizeof(_str),
71 #endif // _MSC_VER
72 
73 #define CONDITION_CHK(condition, severity, fail_msg) \
74         total++; \
75         var_severity = severity; \
76         if (condition) { \
77             switch (var_severity) { \
78                 case IDLE_CHK_ERROR: \
79                     DbgMessage(pdev, FATAL, "idle_chk. Error   (level %d): %s\n", severity, fail_msg); \
80                     errors++; \
81                     break; \
82                 case IDLE_CHK_ERROR_NO_TRAFFIC: \
83                     DbgMessage(pdev, FATAL, "idle_chk. Error if no traffic (level %d):   %s\n", severity, fail_msg); \
84                     errors++; \
85                     break; \
86                 case IDLE_CHK_WARNING: \
87                     DbgMessage(pdev, WARN, "idle_chk. Warning (level %d): %s\n", severity, fail_msg); \
88                     warnings++; \
89                     break; \
90             }\
91         }
92 
93 
94 #define IDLE_CHK_CHIP_MASK_CHK(chip_mask) { \
95         b_test_chip=0; \
96         var_chip_mask = 0; \
97         val = REG_RD(pdev, MISC_REG_CHIP_NUM); \
98         chip_rev = REG_RD(pdev, MISC_REG_CHIP_REV); \
99         chip_metal = REG_RD(pdev,  MISC_REG_CHIP_METAL); \
100         if (val == 5710) { \
101             var_chip_mask = IDLE_CHK_CHIP_MASK_57710; \
102         } else if (val == 5711 || val == 5712) { \
103             var_chip_mask = IDLE_CHK_CHIP_MASK_57711; \
104         } else if ((val == 5713) || (val == 5714) || (val == 5730) || (val == 5731))  { \
105             var_chip_mask =  IDLE_CHK_CHIP_MASK_57731; \
106         } else if (((chip_rev == 0xC) || (chip_rev == 0xD) || (chip_rev == 1)) && ((val == 5773) || (val == 5774) || (val == 5770))) { \
107             var_chip_mask =  IDLE_CHK_CHIP_MASK_57773_B0; \
108         } else if ((val == 5773) || (val == 5774) || (val == 5770)) { \
109             var_chip_mask =  IDLE_CHK_CHIP_MASK_57773; \
110         } \
111         if (var_chip_mask & chip_mask) { \
112             b_test_chip = 1;\
113         } \
114 }
115 
116 /* read one reg and check the condition */
117 #define IDLE_CHK_1(chip_mask, offset, condition, severity, fail_msg) \
118         IDLE_CHK_CHIP_MASK_CHK(chip_mask); \
119         if (b_test_chip) { \
120             val = REG_RD(pdev, offset); \
121             snprintf (prnt_str, SNPRINTF_VAR(prnt_str) "%s. Value is 0x%x\n", fail_msg, val); \
122             val1 = 0; \
123             val2 = 0; \
124             CONDITION_CHK(condition, severity, prnt_str); \
125         }
126 
127 /* loop to read one reg and check the condition */
128 #define IDLE_CHK_2(chip_mask, offset, loop, inc, condition, severity, fail_msg) \
129         IDLE_CHK_CHIP_MASK_CHK(chip_mask); \
130         if (b_test_chip) { \
131             for (i = 0; i < (loop); i++) { \
132                 val = REG_RD(pdev, offset + i*(inc)); \
133                 snprintf (prnt_str, SNPRINTF_VAR(prnt_str) "%s. Value is 0x%x\n", fail_msg, val); \
134                 val1 = 0; \
135                 val2 = 0; \
136                 CONDITION_CHK(condition, severity, prnt_str); \
137             } \
138         }
139 
140 /* read two regs and check the condition */
141 #define IDLE_CHK_3(chip_mask, offset1, offset2, condition, severity, fail_msg) \
142          IDLE_CHK_CHIP_MASK_CHK(chip_mask); \
143          if (b_test_chip) { \
144             val1 = REG_RD(pdev, offset1); \
145             val2 = REG_RD(pdev, offset2); \
146             snprintf (prnt_str, SNPRINTF_VAR(prnt_str) "%s. Values are 0x%x 0x%x\n", fail_msg, val1, val2); \
147             val = 0; \
148             CONDITION_CHK(condition, severity, prnt_str); \
149          }
150 
151 /* read one reg and check according to CID_CAM */
152 #define IDLE_CHK_4(chip_mask, offset1, offset2, loop, inc, condition, severity, fail_msg) \
153         IDLE_CHK_CHIP_MASK_CHK(chip_mask); \
154         if (b_test_chip) { \
155             for (i = 0; i < (loop); i++) { \
156                 val1 = REG_RD(pdev, (offset1 + i*inc)); \
157                 val2 = REG_RD(pdev, (offset2 + i*(inc))); \
158                 val2 = val2 >> 1; \
159                 snprintf (prnt_str, SNPRINTF_VAR(prnt_str)  "%s LCID %d CID_CAM 0x%x. Value is 0x%x\n", fail_msg, i, val2, val1);\
160                 val = 0; \
161                 CONDITION_CHK(condition, severity, prnt_str); \
162             } \
163         }
164 
165 
166 /* read one reg and check according to another reg */
167 #define IDLE_CHK_5(chip_mask, offset, offset1, offset2, condition, severity, fail_msg) \
168         IDLE_CHK_CHIP_MASK_CHK(chip_mask); \
169         if (b_test_chip) { \
170             val = REG_RD(pdev, offset);\
171             if (!val) \
172                 IDLE_CHK_3(chip_mask, offset1, offset2, condition, severity, fail_msg); \
173         }
174 
175 /* read wide-bus reg and check sub-fields */
176 #define IDLE_CHK_6(chip_mask, offset, loop, inc, severity) \
177      { \
178         u32 rd_ptr, wr_ptr, rd_bank, wr_bank; \
179         IDLE_CHK_CHIP_MASK_CHK(chip_mask); \
180         if (b_test_chip) { \
181             for (i = 0; i < (loop); i++) { \
182                 val1 = REG_RD(pdev, offset + i*(inc)); \
183                 val2 = REG_RD(pdev, offset + i*(inc) + 4); \
184                 rd_ptr = ((val1 & 0x3FFFFFC0) >> 6); \
185                 wr_ptr = ((((val1 & 0xC0000000) >> 30) & 0x3) | ((val2 & 0x3FFFFF) << 2)); \
186                 snprintf (prnt_str, SNPRINTF_VAR(prnt_str) "QM: PTRTBL entry %d- rd_ptr is not equal to wr_ptr. Values are 0x%x 0x%x\n", i, rd_ptr, wr_ptr);\
187                 val = 0; \
188                 CONDITION_CHK((rd_ptr != wr_ptr), severity, prnt_str);\
189                 rd_bank = ((val1 & 0x30) >> 4); \
190                 wr_bank = (val1 & 0x03); \
191                 snprintf (prnt_str, SNPRINTF_VAR(prnt_str) "QM: PTRTBL entry %d- rd_bank is not equal to wr_bank. Values are 0x%x 0x%x\n", i, rd_bank, wr_bank); \
192                 val = 0; \
193                 CONDITION_CHK((rd_bank != wr_bank), severity, prnt_str); \
194             } \
195         } \
196       }
197 
198 
199 /* loop to read wide-bus reg and check according to another reg */
200 #define IDLE_CHK_7(chip_mask, offset, offset1, offset2, loop, inc, condition, severity, fail_msg) \
201     { \
202         u32_t chip_num; \
203         IDLE_CHK_CHIP_MASK_CHK(chip_mask); \
204         if (b_test_chip) { \
205             for (i = 0; i < (loop); i++) { \
206                 val = REG_RD(pdev, offset2 + i*4); \
207                 if ((val & 0x1) == 1) { \
208                     chip_num = REG_RD(pdev , MISC_REG_CHIP_NUM); \
209                     if ((chip_num == 0x1662) || (chip_num == 0x1663) || (chip_num == 0x1651) || (chip_num == 0x1652)) { \
210                         val1 = REG_RD(pdev, offset1 + i*(inc)); \
211                         val1 = REG_RD(pdev, offset1 + i*(inc) + 4); \
212                         val1 = REG_RD(pdev, offset1 + i*(inc) + 8); \
213                         REG_RD(pdev, offset1 + i*(inc) + 12); \
214                         val1 = (val1 & 0x1E000000) >> 25; \
215                     } else { \
216                         val1 = REG_RD(pdev, offset1 + i*(inc)); \
217                         val1 = REG_RD(pdev, offset1 + i*(inc) + 4); \
218                         val1 = REG_RD(pdev, offset1 + i*(inc) + 8); \
219                         REG_RD(pdev, offset1 + i*(inc) + 12); \
220                         val1 = (val1 & 0x00000078) >> 3; \
221                     } \
222                     val2 = REG_RD(pdev, offset + i*4); \
223                     snprintf (prnt_str, SNPRINTF_VAR(prnt_str) "%s - LCID %d CID_CAM 0x%x. Value is 0x%x\n", fail_msg, i, val2, val1); \
224                     CONDITION_CHK(condition, severity, prnt_str); \
225                 } \
226             } \
227         } \
228     }
229 
230 /* check PXP VQ occupancy according to condition */
231 #define IDLE_CHK_8(chip_mask, offset, condition, severity, fail_msg) \
232         IDLE_CHK_CHIP_MASK_CHK(chip_mask); \
233         if (b_test_chip) { \
234             val = REG_RD(pdev, offset); \
235             if (condition) { \
236                 snprintf (prnt_str, SNPRINTF_VAR(prnt_str)  "%s. Value is 0x%x\n%s\n", fail_msg, val,_vq_hoq(pdev,#offset)); \
237                 val = 0; \
238                 val1 = 0; \
239                 val2 = 0; \
240                 CONDITION_CHK(1, severity, prnt_str); \
241             } \
242         }
243 
244 #endif// _LM_DEBUG_H
245 
246