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Searched refs:HC_R0INT_ENA (Results 1 – 2 of 2) sorted by relevance

/illumos-gate/usr/src/uts/common/sys/fibre-channel/fca/emlxs/
H A Demlxs_hw.h611 #define EMLXS_MSI0_MASK1 (HC_R0INT_ENA|HC_R1INT_ENA|HC_R2INT_ENA| \
672 #define HC_R0INT_ENA 0x00000002 /* Bit 1 */ macro
/illumos-gate/usr/src/uts/common/io/fibre-channel/fca/emlxs/
H A Demlxs_sli3.c4450 if ((ha_copy2 & HA_R0ATT) && !(mask & HC_R0INT_ENA)) { in emlxs_get_attention()
6664 HC_R0INT_ENA); in emlxs_sli3_enable_intr()
6666 status |= (HC_R2INT_ENA | HC_R1INT_ENA | HC_R0INT_ENA); in emlxs_sli3_enable_intr()
6668 status |= (HC_R1INT_ENA | HC_R0INT_ENA); in emlxs_sli3_enable_intr()
6670 status |= (HC_R0INT_ENA); in emlxs_sli3_enable_intr()