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Searched refs:GEN7_SQ_CHICKEN_MBCUNIT_CONFIG (Results 1 – 2 of 2) sorted by relevance

/gfx-drm/usr/src/uts/intel/io/i915/
H A Dintel_pm.c4212 I915_WRITE(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG, in haswell_init_clock_gating()
4213 I915_READ(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG) | in haswell_init_clock_gating()
4306 I915_WRITE(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG, in ivybridge_init_clock_gating()
4307 I915_READ(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG) | in ivybridge_init_clock_gating()
4370 I915_WRITE(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG, in valleyview_init_clock_gating()
4371 I915_READ(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG) | in valleyview_init_clock_gating()
H A Di915_reg.h3876 #define GEN7_SQ_CHICKEN_MBCUNIT_CONFIG 0x9030 macro