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Searched refs:GEN6_TD_FOUR_ROW_DISPATCH_DISABLE (Results 1 – 2 of 2) sorted by relevance

/gfx-drm/usr/src/uts/intel/io/i915/
H A Di915_reg.h799 #define GEN6_TD_FOUR_ROW_DISPATCH_DISABLE (1 << 5) macro
H A Dintel_pm.c4070 _MASKED_BIT_ENABLE(GEN6_TD_FOUR_ROW_DISPATCH_DISABLE)); in gen6_init_clock_gating()