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Searched refs:GEN6_RP_IDLE_HYSTERSIS (Results 1 – 2 of 2) sorted by relevance

/gfx-drm/usr/src/uts/intel/io/i915/
H A Dintel_pm.c3318 I915_WRITE(GEN6_RP_IDLE_HYSTERSIS, 10); in gen6_enable_rps()
3541 I915_WRITE(GEN6_RP_IDLE_HYSTERSIS, 10); in valleyview_enable_rps()
H A Di915_reg.h4628 #define GEN6_RP_IDLE_HYSTERSIS 0xA070 macro