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Searched refs:GEN6_RC6_THRESHOLD (Results 1 – 2 of 2) sorted by relevance

/gfx-drm/usr/src/uts/intel/io/i915/
H A Dintel_pm.c3266 I915_WRITE(GEN6_RC6_THRESHOLD, 50000); in gen6_enable_rps()
3558 I915_WRITE(GEN6_RC6_THRESHOLD, 0xc350); in valleyview_enable_rps()
H A Di915_reg.h4637 #define GEN6_RC6_THRESHOLD 0xA0B8 macro