Searched refs:DSTATE_PLL_D3_OFF (Results 1 – 2 of 2) sorted by relevance
/gfx-drm/usr/src/uts/intel/io/i915/ | ||
H A D | i915_reg.h | 1342 #define DSTATE_PLL_D3_OFF (1<<3) macro |
H A D | intel_pm.c | 4482 dstate |= DSTATE_PLL_D3_OFF | DSTATE_GFX_CLOCK_GATING | in gen3_init_clock_gating() |