Searched refs:D8390_P0_ISR (Results 1 – 2 of 2) sorted by relevance
175 outb(D8390_ISR_RDC, eth_nic_base + D8390_P0_ISR); in eth_pio_write()215 (inb(eth_nic_base + D8390_P0_ISR) & D8390_ISR_RDC) in eth_pio_write()222 while((inb(eth_nic_base + D8390_P0_ISR) & D8390_ISR_RDC) in eth_pio_write()292 outb(0xFF, eth_nic_base+D8390_P0_ISR); in ns8390_reset()315 outb(0xFF, eth_nic_base+D8390_P0_ISR); in ns8390_reset()379 outb(D8390_ISR_OVW, eth_nic_base+D8390_P0_ISR); in eth_rx_overrun()499 if (!eth_drain_receiver && (inb(eth_nic_base+D8390_P0_ISR) & D8390_ISR_OVW)) { in ns8390_poll()
174 #define D8390_P0_ISR 0x07 macro