/illumos-gate/usr/src/uts/common/io/bnx/570x/common/include/ |
H A D | 54xx_reg.h | 41 #define PHY_STATUS_AUTO_NEG_COMPLETE BIT_5 65 #define PHY_AN_AD_10BASET_HALF BIT_5 75 #define PHY_AN_AD_1000X_FULL_DUPLEX BIT_5 85 #define PHY_LINK_PARTNER_10BASET_HALF BIT_5 179 #define BCM5401_SHDW_NORMAL_DISABLE_LOW_PWR BIT_5
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/illumos-gate/usr/src/uts/common/sys/fibre-channel/fca/qlc/ |
H A D | ql_mbx.h | 379 #define IDC_FUNC_DST_MASK (BIT_5 | BIT_4) 403 #define IDC_RIT_MASK (BIT_6 | BIT_5 | BIT_4) 429 #define IDC_MS_MASK (BIT_7 | BIT_6 | BIT_5 | BIT_4) 544 #define MBX_5 BIT_5 596 #define FO1_DISABLE_100MS_LOS_WAIT BIT_5 610 #define FO2_ENABLE_SELECTIVE_CLASS_2 BIT_5 616 #define FO3_STARTUP_OPTS_VALID BIT_5 654 #define FWATTRIB2_VI BIT_5 670 #define IMO_DEVICE_FUNCTION_NUMBER BIT_5 826 #define LINK_CONFIG_PAUSE_MASK (BIT_6 | BIT_5)
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H A D | ql_api.h | 184 #define BIT_5 0x20 macro 603 #define MWB_4096_BYTES (BIT_5 | BIT_4) 604 #define MWB_2048_BYTES BIT_5 808 #define HC_RISC_PAUSE BIT_5 /* Pause mode bit */ 938 #define VPO_TARGET_MODE_DISABLED BIT_5 1484 #define TQF_NEED_AUTHENTICATION BIT_5 1597 #define QL_CONFIG_SPACE_SETUP BIT_5 1943 #define POINT_TO_POINT (uint64_t)BIT_5 1981 #define FC_STATE_CHANGE (uint64_t)BIT_5 2033 #define CFG_ENABLE_LINK_DOWN_REPORTING (uint64_t)BIT_5 [all …]
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H A D | ql_iocb.h | 93 #define CF_DATA_IN BIT_5 298 #define RF_INV_E_ORDER BIT_5 /* Invalid entry order. */ 319 #define SF_ARQ_DONE BIT_5 332 #define SF_DATA_IN BIT_5 669 #define CFO_SKIP_PRLI BIT_5 675 #define CFO_IMPLICIT_LOGO_ALL BIT_5 1158 #define IPCF_FIRST_SEQ BIT_5
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H A D | ql_xioctl.h | 218 #define FLASH4096 BIT_5
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/illumos-gate/usr/src/uts/common/io/comstar/port/qlt/ |
H A D | qlt_regs.h | 78 #define RISC_RESET BIT_5 83 #define PCI_X_XFER_CTRL (BIT_4 | BIT_5) 103 BIT_7 | BIT_6 | BIT_5 | BIT_4 | \ 112 #define FW_INTR_STATUS_MASK (BIT_7 | BIT_6 | BIT_5 | BIT_4 | \
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H A D | qlt.c | 2220 DMEM_WR32(qlt, icb+0x5c, BIT_5 | BIT_4); in qlt_port_online() 2223 BIT_11 | BIT_5 | BIT_4 | BIT_2 | BIT_1 | BIT_0); in qlt_port_online() 2233 BIT_26 | BIT_23 | BIT_22 | BIT_5); in qlt_port_online() 2237 icb+0x60, BIT_26 | BIT_23 | BIT_22 | BIT_5); in qlt_port_online() 2262 DMEM_WR32(qlt, icb+0x5c, BIT_11 | BIT_5 | BIT_4 | in qlt_port_online() 2264 DMEM_WR32(qlt, icb+0x60, BIT_5); in qlt_port_online() 2370 BIT_10 | BIT_9 | BIT_8 | BIT_7 | BIT_6 | BIT_5 | in qlt_port_online() 2405 BIT_10 | BIT_9 | BIT_8 | BIT_7 | BIT_6 | BIT_5 | in qlt_port_online() 5851 req1f = BIT_5; in qlt_send_els_response() 6303 else if (tm & BIT_5) in qlt_handle_atio()
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/illumos-gate/usr/src/uts/common/io/bnx/include/ |
H A D | bits.h | 32 #define BIT_5 0x20 macro
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/illumos-gate/usr/src/uts/common/io/skd/ |
H A D | skd.h | 71 #define BIT_5 0x00020 macro 92 #define SKD_IOMAP_IOBASE_MAPPED BIT_5
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/illumos-gate/usr/src/uts/common/io/fibre-channel/fca/qlc/ |
H A D | ql_init.c | 569 BIT_5); in ql_nvram_config() 644 if (nv->host_p[0] & BIT_5) { in ql_nvram_config() 677 (icb->special_options[0] | BIT_5); in ql_nvram_config() 689 BIT_7 | BIT_6 | BIT_5 | BIT_2 | BIT_0); in ql_nvram_config() 698 (icb->add_fw_opt[1] | BIT_5 | BIT_4); in ql_nvram_config() 1043 nv->firmware_options_1[1] = BIT_5; in ql_nvram_24xx_config() 1044 nv->firmware_options_2[0] = BIT_5; in ql_nvram_24xx_config() 1175 ~(BIT_5 | BIT_4)); in ql_nvram_24xx_config() 1584 ~(BIT_6 | BIT_5 | BIT_4)); in ql_23_properties() 2019 ~(BIT_6 | BIT_5 | BIT_4)); in ql_24xx_properties() [all …]
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H A D | ql_ioctl.c | 633 nv->firmware_options_1[1] = BIT_5; in ql_set_nvram_adapter_defaults() 634 nv->firmware_options_2[0] = BIT_5; in ql_set_nvram_adapter_defaults() 706 nv->firmware_options[1] = BIT_7 | BIT_5 | BIT_2; in ql_set_nvram_adapter_defaults()
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H A D | ql_isr.c | 1826 } else if (pkt->entry_status & BIT_5) { in ql_error_entry() 1877 if (pkt->entry_status & (BIT_5 + BIT_4 + BIT_3 + BIT_2)) { in ql_error_entry()
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H A D | ql_api.c | 4592 *bptr & (BIT_6 | BIT_5 | BIT_4))) { in ql_port_manage() 4595 (*bptr & ~(BIT_6|BIT_5|BIT_4)); in ql_port_manage() 11399 if (flash_data & BIT_5 && cnt > 2) { in ql_poll_flash()
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/illumos-gate/usr/src/uts/common/sys/ |
H A D | stmf_defines.h | 36 #define BIT_5 0x20 macro
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/illumos-gate/usr/src/uts/common/sys/fibre-channel/fca/qlge/ |
H A D | qlge_hw.h | 49 #define BIT_5 0x20 macro 412 #define RT_IDX_FC_MACH BIT_5 525 #define CQ_5_NOT_EMPTY BIT_5 2320 #define FLASH4096 BIT_5
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H A D | qlge.h | 239 #define INIT_SETUP_RINGS BIT_5 633 #define CFG_CKSUM_HEADER_IPv4 BIT_5
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/illumos-gate/usr/src/uts/common/io/comstar/port/fcoet/ |
H A D | fcoet_eth.c | 590 } else if (tm & BIT_5) { in fcoet_process_unsol_fcp_cmd()
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/illumos-gate/usr/src/uts/common/io/fibre-channel/fca/fcoei/ |
H A D | fcoei_eth.c | 985 (FCOE_B2V_4(src + offset) & BIT_5) ? 1 : 0; in fcoei_fill_els_fpkt_resp()
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/illumos-gate/usr/src/uts/common/io/fibre-channel/fca/emlxs/ |
H A D | emlxs_fct.c | 2484 } else if (tm & BIT_5) { in emlxs_fct_handle_unsol_req()
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