Searched refs:B0_HWE_ISRC (Results 1 – 2 of 2) sorted by relevance
261 #define B0_HWE_ISRC 0x0010 /* 32 bit HW Error Interrupt Src Reg */ macro
2093 status = CSR_READ_4(dev, B0_HWE_ISRC); in yge_intr_hwerr()