Searched refs:regs (Results 26 - 50 of 240) sorted by relevance

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/illumos-gate/usr/src/cmd/mdb/intel/mdb/
H A Dkvm_isadep.h42 extern void kt_regs_to_kregs(struct regs *, mdb_tgt_gregset_t *);
/illumos-gate/usr/src/uts/common/io/rtw/
H A Drtwreg.h1219 #define RTW_READ8(regs, ofs) \
1220 ddi_get8((regs)->r_handle, \
1221 (uint8_t *)((regs)->r_base + (ofs)))
1223 #define RTW_READ16(regs, ofs) \
1224 ddi_get16((regs)->r_handle, \
1225 (uint16_t *)((uintptr_t)(regs)->r_base + (ofs)))
1227 #define RTW_READ(regs, ofs) \
1228 ddi_get32((regs)->r_handle, \
1229 (uint32_t *)((uintptr_t)(regs)->r_base + (ofs)))
1231 #define RTW_WRITE8(regs, of
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/illumos-gate/usr/src/uts/common/sys/
H A Dcore.h59 struct regs c_regs; /* General purpose registers */
/illumos-gate/usr/src/cmd/mdb/sparc/kmdb/
H A Dkaif.c325 * Sun4v doesn't have watchpoint regs
424 * Sun4v doesn't have watch point regs
455 * Sun4v doesn't have watch point regs
480 * Sun4v doesn't have watch point regs
501 * Sun4v doesn't have watch point regs
893 struct regs regs; local
898 * fully-populated struct regs, which we're going to build using the
904 regs.r_tstate = kaif_cb_save.krs_tstate;
906 regs
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/illumos-gate/usr/src/lib/libproc/common/
H A DPservice.c123 ps_lgetregs(struct ps_prochandle *P, lwpid_t lwpid, prgregset_t regs) argument
128 if (Plwp_getregs(P, lwpid, regs) == 0)
135 ps_lsetregs(struct ps_prochandle *P, lwpid_t lwpid, const prgregset_t regs) argument
140 if (Plwp_setregs(P, lwpid, regs) == 0)
147 ps_lgetfpregs(struct ps_prochandle *P, lwpid_t lwpid, prfpregset_t *regs) argument
152 if (Plwp_getfpregs(P, lwpid, regs) == 0)
159 ps_lsetfpregs(struct ps_prochandle *P, lwpid_t lwpid, const prfpregset_t *regs) argument
164 if (Plwp_setfpregs(P, lwpid, regs) == 0)
242 prgregset_t regs; local
256 if ((error = ps_lgetregs(P, lwpid, regs)) !
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/illumos-gate/usr/src/uts/sparc/sys/
H A Dstack.h158 struct regs;
164 void traceregs(struct regs *);
/illumos-gate/usr/src/uts/intel/ia32/sys/
H A Dstack.h149 struct regs;
151 void traceregs(struct regs *);
/illumos-gate/usr/src/uts/i86pc/sys/
H A Dcpu_module_impl.h62 uint64_t (*cmi_mca_trap)(cmi_hdl_t, struct regs *);
75 extern int cmi_mce_response(struct regs *, uint64_t);
/illumos-gate/usr/src/cmd/luxadm/
H A Dfcalupdate.c143 volatile socal_reg_t *regs; local
265 regs = (socal_reg_t *)((int)addr + REG_OFFSET);
275 retval += load_file(file, addr, regs);
442 volatile socal_reg_t *regs)
447 if (!write_feprom((uchar_t *)0, dest_address, regs)) {
456 if (feprom_erase(dest_address, regs))
476 if (!(write_feprom(source_address, dest_address, regs))) {
484 regs->socal_cr.w &= ~(0x30000);
494 volatile socal_reg_t *regs)
505 regs
441 feprom_program(uchar_t *source_address, uchar_t *dest_address, volatile socal_reg_t *regs) argument
493 write_feprom(uchar_t *source_address, uchar_t *dest_address, volatile socal_reg_t *regs) argument
535 feprom_erase(volatile uchar_t *dest_address, volatile socal_reg_t *regs) argument
681 feprom_read(uchar_t *source_address, uchar_t *dest_address, int offset, int size, volatile socal_reg_t *regs) argument
716 load_file(char *file, caddr_t prom, volatile socal_reg_t *regs) argument
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/illumos-gate/usr/src/uts/sparc/sys/fpu/
H A Dglobals.h59 #define DOUBLE(n) ((n & 0xfffe) >> 1) /* Shift n to access double regs. */
88 struct regs *, void *, kfpu_t *);
98 extern enum ftt_type movcc(fp_simd_type *, fp_inst_type, struct regs *,
100 extern enum ftt_type fldst(fp_simd_type *, fp_inst_type, struct regs *,
131 extern enum ftt_type read_iureg(fp_simd_type *, uint_t, struct regs *,
133 extern enum ftt_type write_iureg(fp_simd_type *, uint_t, struct regs *,
H A Dfpu_simulator.h265 struct regs *fp_traprp;
396 struct regs *pregs, fsr_type *pfsr, uint64_t gsr, uint32_t inst);
408 struct regs *rp, void *prw, kfpu_t *pfpu);
413 extern void fp_traps(fp_simd_type *pfpsd, enum ftt_type ftt, struct regs *rp);
427 extern void fp_precise(struct regs *rp);
434 extern void fpu_trap(struct regs *rp, caddr_t addr, uint32_t type,
456 struct regs *pregs, /* Pointer to PCB image of registers. */
467 struct regs *rp); /* Pointer to PCB image of registers. */
482 struct regs *rp); /* Pointer to PCB image of registers. */
490 struct regs *r
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/illumos-gate/usr/src/uts/common/io/
H A Dbusra.c938 pci_regspec_t *regs; local
1025 "available", (caddr_t)&regs, &rlen) == DDI_SUCCESS) {
1039 switch (PCI_REG_ADDR_G(regs[i].pci_phys_hi)) {
1042 (uint64_t)regs[i].pci_phys_low,
1043 (uint64_t)regs[i].pci_size_low,
1044 (regs[i].pci_phys_hi & PCI_REG_PF_M) ?
1051 ((uint64_t)(regs[i].pci_phys_mid) << 32) |
1052 ((uint64_t)(regs[i].pci_phys_low)),
1053 ((uint64_t)(regs[i].pci_size_hi) << 32) |
1054 ((uint64_t)(regs[
1324 pci_regspec_t *regs, *newregs; local
1475 pci_regspec_t *regs, *newregs; local
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/illumos-gate/usr/src/uts/common/io/hxge/
H A Dhxge_pfc.h47 /* Number of multicast filter regs */
218 hxge_tcam_reg_t regs; member in union:hxge_tcam_entry_S::_hxge_tcam_entry
225 #define key_reg0 key.regs.reg0
226 #define key_reg1 key.regs.reg1
227 #define mask_reg0 mask.regs.reg0
228 #define mask_reg1 mask.regs.reg1
230 #define key0 key.regs.reg0
231 #define key1 key.regs.reg1
232 #define mask0 mask.regs.reg0
233 #define mask1 mask.regs
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/illumos-gate/usr/src/uts/sparc/v9/sys/
H A Dvis_simulator.h162 struct regs *, void *, kfpu_t *);
167 enum ftt_type vis_fldst(fp_simd_type *, fp_inst_type, struct regs *,
173 enum ftt_type vis_rdgsr(fp_simd_type *, fp_inst_type, struct regs *,
179 enum ftt_type vis_wrgsr(fp_simd_type *, fp_inst_type, struct regs *,
H A Dmachpcb.h56 * Distance from beginning of thread stack (t_stk) to saved regs struct.
67 struct regs mpcb_regs; /* user's saved registers */
/illumos-gate/usr/src/uts/sparc/v7/sys/
H A Dmachpcb.h53 * Distance from beginning of thread stack (t_stk) to saved regs struct.
64 struct regs mpcb_regs; /* user's saved registers */
82 #define CLEAN_WINDOWS 0x01 /* keep user regs clean */
/illumos-gate/usr/src/cmd/sgs/librtld_db/demo/
H A DMakefile.com37 M_SRC= regs.c m_utils.c
68 test-sparc= test-sparc-regs
/illumos-gate/usr/src/cmd/mdb/intel/modules/mdb_kb/
H A Dmdb_kb.c1508 struct regs *regs; local
1519 regs = &mregs->pm_gregs;
1521 regs->r_ss = ur->ss;
1522 regs->r_cs = ur->cs;
1523 regs->r_ds = ur->ds;
1524 regs->r_es = ur->es;
1525 regs->r_fs = ur->fs;
1526 regs->r_gs = ur->gs;
1527 regs
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/illumos-gate/usr/src/cmd/sunpc/other/
H A Ddos2unix.c328 union REGS regs; local
329 regs.h.ah = 0x66; /* get/set global code page */
330 regs.h.al = 0x01; /* get */
331 intdos(&regs, &regs);
332 type = regs.x.bx;
H A Dunix2dos.c334 union REGS regs; local
335 regs.h.ah = 0x66; /* get/set global code page */
336 regs.h.al = 0x01; /* get */
337 intdos(&regs, &regs);
338 type = regs.x.bx;
/illumos-gate/usr/src/uts/i86pc/os/
H A Ddtrace_subr.c174 int (*dtrace_pid_probe_ptr)(struct regs *);
175 int (*dtrace_return_probe_ptr)(struct regs *);
178 dtrace_user_probe(struct regs *rp, caddr_t addr, processorid_t cpuid)
182 extern void trap(struct regs *, caddr_t, processorid_t);
298 struct regs *rp = lwptoregs(ttolwp(t));
323 struct regs *rp = lwptoregs(ttolwp(t));
/illumos-gate/usr/src/uts/i86pc/io/pciex/
H A Dnpe_misc.c154 uint32_t regs; local
160 regs = pcie_get_aer_uce_mask() | npe_aer_uce_mask |
162 pcie_set_aer_uce_mask(regs);
174 uint32_t regs; local
191 regs = pcie_get_aer_uce_mask() | PCIE_AER_UCE_ECRC;
192 pcie_set_aer_uce_mask(regs);
324 * save config regs for HyperTransport devices without drivers of classes:
352 "regs for %s\n", ddi_node_name(cdip));
382 "regs for %s\n", ddi_node_name(cdip));
/illumos-gate/usr/src/uts/common/io/audio/drv/audioemu10k/
H A Daudioemu10k.c183 OUTB(devc, index, devc->regs + 0x1e);
185 if (INB(devc, devc->regs + 0x1e) & 0x80)
192 dtemp = INW(devc, devc->regs + 0x1c);
207 OUTB(devc, index, devc->regs + 0x1e);
209 if (INB(devc, devc->regs + 0x1e) & 0x80)
211 OUTW(devc, data, devc->regs + 0x1c);
225 OUTL(devc, ptr, devc->regs + 0x00); /* Pointer */
226 val = INL(devc, devc->regs + 0x04); /* Data */
247 OUTL(devc, ptr, devc->regs + 0x00); /* Pointer */
254 value |= INL(devc, devc->regs
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/illumos-gate/usr/src/uts/common/io/nxge/
H A Dnxge_hio_guest.c63 dev_regs_t *regs; local
74 regs = nxge->dev_regs;
81 rv = ddi_regs_map_setup(nxge->dip, 0, (caddr_t *)&regs->nxge_regp, 0, 0,
82 &nxge_guest_register_access_attributes, &regs->nxge_regh);
89 nxge->npi_handle.regh = regs->nxge_regh;
90 nxge->npi_handle.regp = (npi_reg_ptr_t)regs->nxge_regp;
97 nxge->npi_reg_handle.regh = regs->nxge_regh;
98 nxge->npi_reg_handle.regp = (npi_reg_ptr_t)regs->nxge_regp;
105 nxge->npi_vreg_handle.regh = regs->nxge_regh;
106 nxge->npi_vreg_handle.regp = (npi_reg_ptr_t)regs
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/illumos-gate/usr/src/uts/common/io/audio/drv/audiocmi/
H A Daudiocmi.h301 caddr_t regs; member in struct:cmpci_dev
325 ddi_get8(dev->acch, (uint8_t *)(dev->regs + (offset)))
327 ddi_get16(dev->acch, (uint16_t *)(void *)(dev->regs + (offset)))
329 ddi_get32(dev->acch, (uint32_t *)(void *)(dev->regs + (offset)))
331 ddi_put8(dev->acch, (uint8_t *)(dev->regs + (offset)), v)
333 ddi_put16(dev->acch, (uint16_t *)(void *)(dev->regs + (offset)), v)
335 ddi_put32(dev->acch, (uint32_t *)(void *)(dev->regs + (offset)), v)

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