Searched refs:regs (Results 26 - 50 of 250) sorted by relevance

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/illumos-gate/usr/src/uts/sun4/io/px/
H A Dpx_fm.c56 px_err_pcie_t *regs);
59 static void px_pcie_log(dev_info_t *dip, px_err_pcie_t *regs);
586 px_err_check_pcie(dev_info_t *dip, ddi_fm_error_t *derr, px_err_pcie_t *regs, argument
600 if (regs->primary_ue & PCIE_AER_UCE_UR)
602 if (regs->primary_ue & PCIE_AER_UCE_CA)
604 if (regs->primary_ue & (PCIE_AER_UCE_PTLP | PCIE_AER_UCE_ECRC))
607 if (!regs->primary_ue)
610 adv_reg->pcie_ce_status = regs->ce_reg;
611 adv_reg->pcie_ue_status = regs->ue_reg | regs
649 px_pcie_log(dev_info_t *dip, px_err_pcie_t *regs) argument
666 px_pcie_ptlp(dev_info_t *dip, ddi_fm_error_t *derr, px_err_pcie_t *regs) argument
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/illumos-gate/usr/src/uts/i86pc/io/gfx_private/
H A Dgfxp_vgatext.c209 (caddr_t *)&vga->regs.addr, reg_offset, VGA_REG_SIZE,
210 &dev_attr, &vga->regs.handle);
213 vga->regs.mapped = B_TRUE;
224 if (ddi_get8(vga->regs.handle,
225 vga->regs.addr + VGA_MISC_R) & VGA_MISC_IOA_SEL)
274 if (softc->console->vga.regs.mapped)
275 ddi_regs_map_free(&softc->console->vga.regs.handle);
799 msl = vga_get_crtc(&console->vga.regs, VGA_CRTC_MAX_S_LN) & 0x1f;
800 s = vga_get_crtc(&console->vga.regs, VGA_CRTC_CSSL) & 0xc0;
804 vga_set_crtc(&console->vga.regs, VGA_CRTC_CSS
850 struct vgaregmap *regs; local
888 struct vgaregmap *regs; local
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/illumos-gate/usr/src/lib/libdwarf/common/
H A Ddwarf_print_lines.c89 struct Dwarf_Line_Registers_s * regs,
99 regs->lr_address);
100 dwarfstring_append_printf_u(&m1,"/%01u",regs->lr_op_index);
101 dwarfstring_append_printf_u(&m1," %5lu", regs->lr_line);
102 dwarfstring_append_printf_u(&m1," %3d",regs->lr_isa);
103 dwarfstring_append_printf_i(&m1," %1d", regs->lr_basic_block);
104 dwarfstring_append_printf_i(&m1,"%1d\n", regs->lr_end_sequence);
117 "x%" DW_PR_XZEROS DW_PR_DUx, regs->lr_address);
119 "/%01u", regs->lr_op_index);
120 dwarfstring_append_printf_u(&m1," %2lu ",regs
84 print_line_detail( Dwarf_Debug dbg, const char *prefix, int opcode, unsigned curr_line, struct Dwarf_Line_Registers_s * regs, Dwarf_Bool is_single_table, Dwarf_Bool is_actuals_table) argument
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/illumos-gate/usr/src/uts/sun4/os/
H A Ddtrace_subr.c75 int (*dtrace_pid_probe_ptr)(struct regs *);
78 dtrace_pid_probe(struct regs *rp)
118 int (*dtrace_return_probe_ptr)(struct regs *);
121 dtrace_return_probe(struct regs *rp)
178 struct regs *rp = lwptoregs(ttolwp(t));
202 struct regs *rp = lwptoregs(ttolwp(t));
/illumos-gate/usr/src/cmd/mdb/intel/mdb/
H A Dkvm_isadep.c133 mdb_tgt_gregset_t regs; local
156 if (kt_kvmregs(t, cpuid, &regs) != 0) {
157 mdb_warn("failed to get regs for cpu %d\n", cpuid);
162 * Tell the stack walker that we have regs.
165 addr = regs.kregs[KREG_FP];
178 mdb_tgt_gregset_t regs; local
203 if (kt_kvmregs(t, cpuid, &regs) != 0) {
204 mdb_warn("failed to get regs for cpu %d\n", cpuid);
208 return (kt_regs((uintptr_t)&regs, flags, argc, argv));
H A Dkvm_isadep.h42 extern void kt_regs_to_kregs(struct regs *, mdb_tgt_gregset_t *);
/illumos-gate/usr/src/uts/i86pc/sys/
H A Dmachsystm.h98 struct regs *trap_regs;
124 extern void trap(struct regs *, caddr_t, processorid_t);
126 extern void do_interrupt(struct regs *, trap_trace_rec_t *);
132 extern void (*do_interrupt_common)(struct regs *, trap_trace_rec_t *);
178 extern int linear_pc(struct regs *rp, proc_t *p, caddr_t *linearp);
179 extern int dtrace_linear_pc(struct regs *rp, proc_t *p, caddr_t *linearp);
H A Dcpu_module_impl.h62 uint64_t (*cmi_mca_trap)(cmi_hdl_t, struct regs *);
75 extern int cmi_mce_response(struct regs *, uint64_t);
/illumos-gate/usr/src/uts/common/io/rtw/
H A Drtwreg.h1219 #define RTW_READ8(regs, ofs) \
1220 ddi_get8((regs)->r_handle, \
1221 (uint8_t *)((regs)->r_base + (ofs)))
1223 #define RTW_READ16(regs, ofs) \
1224 ddi_get16((regs)->r_handle, \
1225 (uint16_t *)((uintptr_t)(regs)->r_base + (ofs)))
1227 #define RTW_READ(regs, ofs) \
1228 ddi_get32((regs)->r_handle, \
1229 (uint32_t *)((uintptr_t)(regs)->r_base + (ofs)))
1231 #define RTW_WRITE8(regs, of
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/illumos-gate/usr/src/uts/common/sys/
H A Dcore.h59 struct regs c_regs; /* General purpose registers */
/illumos-gate/usr/src/cmd/mdb/sparc/kmdb/
H A Dkaif.c325 * Sun4v doesn't have watchpoint regs
424 * Sun4v doesn't have watch point regs
455 * Sun4v doesn't have watch point regs
480 * Sun4v doesn't have watch point regs
501 * Sun4v doesn't have watch point regs
893 struct regs regs; local
898 * fully-populated struct regs, which we're going to build using the
904 regs.r_tstate = kaif_cb_save.krs_tstate;
906 regs
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/illumos-gate/usr/src/lib/libproc/common/
H A DPservice.c123 ps_lgetregs(struct ps_prochandle *P, lwpid_t lwpid, prgregset_t regs) argument
128 if (Plwp_getregs(P, lwpid, regs) == 0)
135 ps_lsetregs(struct ps_prochandle *P, lwpid_t lwpid, const prgregset_t regs) argument
140 if (Plwp_setregs(P, lwpid, regs) == 0)
147 ps_lgetfpregs(struct ps_prochandle *P, lwpid_t lwpid, prfpregset_t *regs) argument
152 if (Plwp_getfpregs(P, lwpid, regs) == 0)
159 ps_lsetfpregs(struct ps_prochandle *P, lwpid_t lwpid, const prfpregset_t *regs) argument
164 if (Plwp_setfpregs(P, lwpid, regs) == 0)
242 prgregset_t regs; local
256 if ((error = ps_lgetregs(P, lwpid, regs)) !
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/illumos-gate/usr/src/uts/sparc/sys/
H A Dstack.h158 struct regs;
164 void traceregs(struct regs *);
/illumos-gate/usr/src/uts/intel/ia32/sys/
H A Dstack.h149 struct regs;
151 void traceregs(struct regs *);
/illumos-gate/usr/src/uts/sparc/sys/fpu/
H A Dglobals.h59 #define DOUBLE(n) ((n & 0xfffe) >> 1) /* Shift n to access double regs. */
88 struct regs *, void *, kfpu_t *);
98 extern enum ftt_type movcc(fp_simd_type *, fp_inst_type, struct regs *,
100 extern enum ftt_type fldst(fp_simd_type *, fp_inst_type, struct regs *,
131 extern enum ftt_type read_iureg(fp_simd_type *, uint_t, struct regs *,
133 extern enum ftt_type write_iureg(fp_simd_type *, uint_t, struct regs *,
H A Dfpu_simulator.h265 struct regs *fp_traprp;
396 struct regs *pregs, fsr_type *pfsr, uint64_t gsr, uint32_t inst);
408 struct regs *rp, void *prw, kfpu_t *pfpu);
413 extern void fp_traps(fp_simd_type *pfpsd, enum ftt_type ftt, struct regs *rp);
427 extern void fp_precise(struct regs *rp);
434 extern void fpu_trap(struct regs *rp, caddr_t addr, uint32_t type,
456 struct regs *pregs, /* Pointer to PCB image of registers. */
467 struct regs *rp); /* Pointer to PCB image of registers. */
482 struct regs *rp); /* Pointer to PCB image of registers. */
490 struct regs *r
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/illumos-gate/usr/src/cmd/luxadm/
H A Dfcalupdate.c143 volatile socal_reg_t *regs; local
265 regs = (socal_reg_t *)((int)addr + REG_OFFSET);
275 retval += load_file(file, addr, regs);
442 volatile socal_reg_t *regs)
447 if (!write_feprom((uchar_t *)0, dest_address, regs)) {
456 if (feprom_erase(dest_address, regs))
476 if (!(write_feprom(source_address, dest_address, regs))) {
484 regs->socal_cr.w &= ~(0x30000);
494 volatile socal_reg_t *regs)
505 regs
441 feprom_program(uchar_t *source_address, uchar_t *dest_address, volatile socal_reg_t *regs) argument
493 write_feprom(uchar_t *source_address, uchar_t *dest_address, volatile socal_reg_t *regs) argument
535 feprom_erase(volatile uchar_t *dest_address, volatile socal_reg_t *regs) argument
681 feprom_read(uchar_t *source_address, uchar_t *dest_address, int offset, int size, volatile socal_reg_t *regs) argument
716 load_file(char *file, caddr_t prom, volatile socal_reg_t *regs) argument
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/illumos-gate/usr/src/uts/common/io/
H A Dbusra.c938 pci_regspec_t *regs; local
1025 "available", (caddr_t)&regs, &rlen) == DDI_SUCCESS) {
1039 switch (PCI_REG_ADDR_G(regs[i].pci_phys_hi)) {
1042 (uint64_t)regs[i].pci_phys_low,
1043 (uint64_t)regs[i].pci_size_low,
1044 (regs[i].pci_phys_hi & PCI_REG_PF_M) ?
1051 ((uint64_t)(regs[i].pci_phys_mid) << 32) |
1052 ((uint64_t)(regs[i].pci_phys_low)),
1053 ((uint64_t)(regs[i].pci_size_hi) << 32) |
1054 ((uint64_t)(regs[
1324 pci_regspec_t *regs, *newregs; local
1475 pci_regspec_t *regs, *newregs; local
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/illumos-gate/usr/src/uts/intel/io/amdnbtemp/
H A Damdnbtemp.c195 int inst, *regs, ret; local
241 &regs, &nregs) != DDI_PROP_SUCCESS) {
248 ddi_prop_free(regs);
252 at->at_bus = PCI_REG_BUS_G(regs[0]);
253 at->at_dev = PCI_REG_DEV_G(regs[0]);
254 at->at_func = PCI_REG_DEV_G(regs[0]);
255 ddi_prop_free(regs);
/illumos-gate/usr/src/uts/common/io/hxge/
H A Dhxge_pfc.h47 /* Number of multicast filter regs */
218 hxge_tcam_reg_t regs; member in union:hxge_tcam_entry_S::_hxge_tcam_entry
225 #define key_reg0 key.regs.reg0
226 #define key_reg1 key.regs.reg1
227 #define mask_reg0 mask.regs.reg0
228 #define mask_reg1 mask.regs.reg1
230 #define key0 key.regs.reg0
231 #define key1 key.regs.reg1
232 #define mask0 mask.regs.reg0
233 #define mask1 mask.regs
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/illumos-gate/usr/src/uts/sparc/v9/sys/
H A Dvis_simulator.h162 struct regs *, void *, kfpu_t *);
167 enum ftt_type vis_fldst(fp_simd_type *, fp_inst_type, struct regs *,
173 enum ftt_type vis_rdgsr(fp_simd_type *, fp_inst_type, struct regs *,
179 enum ftt_type vis_wrgsr(fp_simd_type *, fp_inst_type, struct regs *,
H A Dmachpcb.h56 * Distance from beginning of thread stack (t_stk) to saved regs struct.
67 struct regs mpcb_regs; /* user's saved registers */
/illumos-gate/usr/src/uts/sparc/v7/sys/
H A Dmachpcb.h53 * Distance from beginning of thread stack (t_stk) to saved regs struct.
64 struct regs mpcb_regs; /* user's saved registers */
82 #define CLEAN_WINDOWS 0x01 /* keep user regs clean */
/illumos-gate/usr/src/cmd/sgs/librtld_db/demo/
H A DMakefile.com37 M_SRC= regs.c m_utils.c
69 test-sparc= test-sparc-regs
/illumos-gate/usr/src/cmd/mdb/intel/modules/mdb_kb/
H A Dmdb_kb.c1508 struct regs *regs; local
1519 regs = &mregs->pm_gregs;
1521 regs->r_ss = ur->ss;
1522 regs->r_cs = ur->cs;
1523 regs->r_ds = ur->ds;
1524 regs->r_es = ur->es;
1525 regs->r_fs = ur->fs;
1526 regs->r_gs = ur->gs;
1527 regs
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