Home
last modified time | relevance | path

Searched refs:reg (Results 176 – 200 of 676) sorted by relevance

12345678910>>...28

/illumos-gate/usr/src/contrib/ast/src/lib/libast/sfio/
H A Dsfmove.c34 Sfoff_t sfmove(Sfio_t* fr, Sfio_t* fw, Sfoff_t n, reg int rc) in sfmove()
40 reg int rc; /* record separator */
43 reg uchar *cp, *next;
44 reg ssize_t r, w;
45 reg uchar *endb;
46 reg int direct;
135 { reg ssize_t maxw = 4*(_Sfpage > 0 ? _Sfpage : SF_PAGE);
H A Dsfstack.c48 reg int n;
49 reg Sfio_t* rf;
50 reg Sfrsrv_t* rsrv;
51 reg Void_t* mtx;
H A Dsfwr.c41 { reg char *sp, *wbuf, *endbuf;
42 reg ssize_t s, w, wr;
137 reg ssize_t w;
138 reg Sfdisc_t* dc;
139 reg int local, oerrno;
167 { reg int rv;
H A Dsfswap.c33 Sfio_t* sfswap(reg Sfio_t* f1, reg Sfio_t* f2) in sfswap()
36 reg Sfio_t* f1; in sfswap()
37 reg Sfio_t* f2;
/illumos-gate/usr/src/uts/sun/sys/
H A Dsocalreg.h59 } reg; member
99 } reg; member
127 } reg; member
183 } reg; member
208 } reg; member
/illumos-gate/usr/src/uts/i86xpv/os/
H A Dmach_kdi.c87 kdi_dreg_get(int reg) in kdi_dreg_get() argument
89 return (__hypercall1(__HYPERVISOR_get_debugreg, (long)reg)); in kdi_dreg_get()
93 kdi_dreg_set(int reg, ulong_t value) in kdi_dreg_set() argument
95 (void) __hypercall2(__HYPERVISOR_set_debugreg, (long)reg, value); in kdi_dreg_set()
/illumos-gate/usr/src/contrib/ast/src/lib/libast/vmalloc/
H A Dvmdebug.c89 reg Vmdata_t* vd = vm->data;
199 reg int n;
221 reg Dbfile_t *last, *db;
272 reg Block_t *b, *endb;
273 reg Seg_t *seg;
274 reg Vmuchar_t *data;
275 reg long offset = -1L;
567 reg Block_t *b, *endb;
568 reg Seg_t* seg;
628 reg int n;
[all …]
/illumos-gate/usr/src/cmd/vgrind/
H A Dretest.c20 char reg[132]; in main() local
29 scanf ("%s", reg); in main()
30 ireg = convexp(reg); in main()
/illumos-gate/usr/src/cmd/bhyve/
H A Dpci_passthru.h22 uint32_t read_config(const struct pcisel *sel, long reg, int width);
23 void write_config(const struct pcisel *sel, long reg, int width, uint32_t data);
28 int set_pcir_handler(struct passthru_softc *sc, int reg, int len,
H A Duart_emul.c605 reg = sc->dll; in uart_read()
610 reg = sc->dlh; in uart_read()
620 reg = sc->ier; in uart_read()
635 reg = iir; in uart_read()
638 reg = sc->lcr; in uart_read()
641 reg = sc->mcr; in uart_read()
653 reg = sc->lsr; in uart_read()
662 reg = sc->msr; in uart_read()
666 reg = sc->scr; in uart_read()
669 reg = 0xFF; in uart_read()
[all …]
/illumos-gate/usr/src/uts/common/io/cxgbe/firmware/
H A Dt5fw_cfg.txt85 reg[0x1044] = 4096 # SGE_FL_BUFFER_SIZE0
87 reg[0x104c] = 1536 # SGE_FL_BUFFER_SIZE2
88 reg[0x1050] = 9024 # SGE_FL_BUFFER_SIZE3
89 reg[0x1054] = 9216 # SGE_FL_BUFFER_SIZE4
90 reg[0x1058] = 2048 # SGE_FL_BUFFER_SIZE5
91 reg[0x105c] = 128 # SGE_FL_BUFFER_SIZE6
92 reg[0x1060] = 8192 # SGE_FL_BUFFER_SIZE7
123 reg[0x7d04] = 0x00010000/0x00010000
126 reg[0x7d6c] = 0x00000000/0x00007000
129 reg[0x7d78] = 0x00000400/0x00000000
[all …]
/illumos-gate/usr/src/uts/intel/io/dnet/
H A Ddnet_mii.c357 int reg; in mii_sync() member
377 regprop[i].reg, regprop[i].value); in mii_sync()
381 regprop[i].reg, regprop[i].value); in mii_sync()
780 ushort_t reg; in dump_NS83840() local
800 reg = mac->mii_read(dip, phy, 0x1b); in dump_NS83840()
802 BIT(9, reg) ? "serial":"nibble"); in dump_NS83840()
805 BIT(reg, 5) ? "" : "no ", in dump_NS83840()
806 BIT(reg, 4) ? "" : "no ", in dump_NS83840()
807 BIT(reg, 3) ? "UTP" : "STP", in dump_NS83840()
808 BIT(reg, 2) ? "low" : "normal", in dump_NS83840()
[all …]
/illumos-gate/usr/src/grub/grub-0.97/netboot/
H A Dr8169.c121 #define RTL_W8(reg, val8) writeb ((val8), ioaddr + (reg)) argument
122 #define RTL_W16(reg, val16) writew ((val16), ioaddr + (reg)) argument
123 #define RTL_W32(reg, val32) writel ((val32), ioaddr + (reg)) argument
124 #define RTL_R8(reg) readb (ioaddr + (reg)) argument
125 #define RTL_R16(reg) readw (ioaddr + (reg)) argument
126 #define RTL_R32(reg) ((unsigned long) readl (ioaddr + (reg))) argument
/illumos-gate/usr/src/uts/common/io/
H A Dpower.c435 uint8_t reg; in power_high_intr() local
451 EPIC_RD(hdl, softsp->power_btn_reg, reg); in power_high_intr()
465 reg = ddi_get8(hdl, softsp->power_btn_reg); in power_high_intr()
466 if (reg & softsp->power_btn_bit) { in power_high_intr()
467 reg &= softsp->power_btn_bit; in power_high_intr()
1162 uint8_t reg; in power_setup_mbc_regs() local
1177 reg = ddi_get8(hdl, softsp->power_btn_reg); in power_setup_mbc_regs()
1178 if (reg & softsp->power_btn_bit) { in power_setup_mbc_regs()
1179 reg &= softsp->power_btn_bit; in power_setup_mbc_regs()
1180 ddi_put8(hdl, softsp->power_btn_reg, reg); in power_setup_mbc_regs()
[all …]
/illumos-gate/usr/src/contrib/ast/src/cmd/ksh93/sh/
H A Dtrestore.c319 struct regnod *reg=0,*regold,*regtop=0; in r_switch() local
322 reg = (struct regnod*)getnode(shp->stk,regnod); in r_switch()
324 regtop = reg; in r_switch()
326 regold->regnxt = reg; in r_switch()
327 reg->regflag = l; in r_switch()
328 reg->regptr = r_arg(shp); in r_switch()
329 reg->regcom = r_tree(shp); in r_switch()
330 regold = reg; in r_switch()
332 if(reg) in r_switch()
333 reg->regnxt = 0; in r_switch()
/illumos-gate/usr/src/uts/common/io/usb/hcd/xhci/
H A Dxhci_event.c81 uint32_t reg; in xhci_event_init() local
98 reg = xhci_get32(xhcip, XHCI_R_RUN, XHCI_ERSTSZ(0)); in xhci_event_init()
99 reg &= ~XHCI_ERSTS_MASK; in xhci_event_init()
100 reg |= XHCI_ERSTS_SET(XHCI_EVENT_NSEGS); in xhci_event_init()
101 xhci_put32(xhcip, XHCI_R_RUN, XHCI_ERSTSZ(0), reg); in xhci_event_init()
/illumos-gate/usr/src/uts/sun4u/sys/
H A Dtraptrace.h157 #define GET_TRACE_TICK(reg, scr) \ argument
158 rdpr %tick, reg;
160 #define GET_TRACE_TICK(reg, scr) \ argument
161 sethi %hi(traptrace_use_stick), reg; \
162 lduw [reg + %lo(traptrace_use_stick)], reg; \
164 brz,a reg, .+12; \
165 rdpr %tick, reg; \
166 rd %asr24, reg;
/illumos-gate/usr/src/uts/intel/asm/
H A Datomic.h111 #define __ATOMIC_OPXX(fxn, type1, type2, op, reg) \ argument
118 : "i" reg (delta) \
168 #define __ATOMIC_OPXX(fxn, type, op, reg) \ argument
176 : reg (new), "1" (cmp) \
212 #define __ATOMIC_OPXX(fxn, type, op, reg) \ argument
218 : "+m" (*target), "+" reg (val)); \
/illumos-gate/usr/src/uts/intel/io/amdzen/
H A Dsmntemp.c114 uint32_t reg; in smntemp_temp_update() local
120 &reg)) != 0) { in smntemp_temp_update()
125 stt->stt_reg = reg; in smntemp_temp_update()
126 raw = SMN_SMU_THERMAL_CURTEMP_TEMPERATURE(reg) >> in smntemp_temp_update()
128 decimal = SMN_SMU_THERMAL_CURTEMP_TEMPERATURE(reg) & in smntemp_temp_update()
130 if ((reg & SMN_SMU_THERMAL_CURTEMP_RANGE_SEL) != 0) { in smntemp_temp_update()
/illumos-gate/usr/src/uts/common/io/i40e/
H A Di40e_main.c1687 uint32_t reg; in i40e_alloc_intr_handles() local
2597 uint32_t reg; in i40e_shutdown_rx_ring() local
2616 reg &= ~I40E_QRX_ENA_QENA_REQ_MASK; in i40e_shutdown_rx_ring()
2633 uint32_t reg; in i40e_shutdown_tx_ring() local
2652 reg &= ~I40E_QTX_ENA_QENA_REQ_MASK; in i40e_shutdown_tx_ring()
2673 uint32_t reg; in i40e_shutdown_ring_wait() local
2854 uint32_t reg; in i40e_setup_rx_ring() local
2882 reg |= I40E_QRX_ENA_QENA_REQ_MASK; in i40e_setup_rx_ring()
2983 uint32_t reg; in i40e_setup_tx_ring() local
3001 reg = I40E_QTX_CTL_PF_QUEUE; in i40e_setup_tx_ring()
[all …]
/illumos-gate/usr/src/uts/i86pc/io/gfx_private/
H A Dgfxp_vgatext.c1232 pci_regspec_t *reg; in vgatext_get_pci_reg_index() local
1242 if (reg[index].pci_size_hi != 0) in vgatext_get_pci_reg_index()
1244 if (reg[index].pci_phys_mid != 0) in vgatext_get_pci_reg_index()
1246 if (reg[index].pci_phys_low > addr) in vgatext_get_pci_reg_index()
1248 if (reg[index].pci_phys_low + reg[index].pci_size_low <= addr) in vgatext_get_pci_reg_index()
1252 kmem_free(reg, (size_t)length); in vgatext_get_pci_reg_index()
1255 kmem_free(reg, (size_t)length); in vgatext_get_pci_reg_index()
1291 struct regspec *reg; in vgatext_get_isa_reg_index() local
1303 if (reg[index].regspec_addr + reg[index].regspec_size <= addr) in vgatext_get_isa_reg_index()
1307 kmem_free(reg, (size_t)length); in vgatext_get_isa_reg_index()
[all …]
/illumos-gate/usr/src/lib/brand/shared/brand/common/
H A Dbrand_util.c331 brand_proc_reg_t reg; in brand_post_init() local
344 reg.sbr_version = version; in brand_post_init()
346 reg.sbr_handler = (caddr_t)brand_handler_table; in brand_post_init()
348 reg.sbr_handler = (caddr_t)brand_handler; in brand_post_init()
351 if ((err = __systemcall(&rval, SYS_brand, B_REGISTER, &reg)) != 0) { in brand_post_init()
/illumos-gate/usr/src/uts/i86pc/os/cpupm/
H A Dspeedstep.c97 uint64_t reg; in write_ctrl() local
107 reg = rdmsr(IA32_PERF_CTL_MSR); in write_ctrl()
108 reg &= ~((uint64_t)0xFFFF); in write_ctrl()
109 reg |= ctrl; in write_ctrl()
110 wrmsr(IA32_PERF_CTL_MSR, reg); in write_ctrl()
/illumos-gate/usr/src/cmd/mdb/intel/mdb/
H A Dproc_ia32dep.c241 struct _fpreg reg; in pt_fpregs() member
289 fpru.reg = fps._st[i]; in pt_fpregs()
291 i, fpru.reg.exponent, in pt_fpregs()
292 fpru.reg.significand[3], fpru.reg.significand[2], in pt_fpregs()
293 fpru.reg.significand[1], fpru.reg.significand[0], in pt_fpregs()
/illumos-gate/usr/src/uts/common/io/afe/
H A Dafe.c1252 switch (reg) { in afe_miireadcomet()
1254 reg = CSR_BMCR; in afe_miireadcomet()
1257 reg = CSR_BMSR; in afe_miireadcomet()
1266 reg = CSR_ANAR; in afe_miireadcomet()
1269 reg = CSR_ANLPAR; in afe_miireadcomet()
1272 reg = CSR_ANER; in afe_miireadcomet()
1349 switch (reg) { in afe_miiwritecomet()
1351 reg = CSR_BMCR; in afe_miiwritecomet()
1354 reg = CSR_BMSR; in afe_miiwritecomet()
1363 reg = CSR_ANAR; in afe_miiwritecomet()
[all …]

12345678910>>...28