1 /** 2 * \file drm.h 3 * Header for the Direct Rendering Manager 4 * 5 * \author Rickard E. (Rik) Faith <faith@valinux.com> 6 * 7 * \par Acknowledgments: 8 * Dec 1999, Richard Henderson <rth@twiddle.net>, move to generic \c cmpxchg. 9 */ 10 11 /* 12 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. 13 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. 14 * All rights reserved. 15 * 16 * Permission is hereby granted, free of charge, to any person obtaining a 17 * copy of this software and associated documentation files (the "Software"), 18 * to deal in the Software without restriction, including without limitation 19 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 20 * and/or sell copies of the Software, and to permit persons to whom the 21 * Software is furnished to do so, subject to the following conditions: 22 * 23 * The above copyright notice and this permission notice (including the next 24 * paragraph) shall be included in all copies or substantial portions of the 25 * Software. 26 * 27 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 28 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 29 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 30 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 31 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 32 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 33 * OTHER DEALINGS IN THE SOFTWARE. 34 */ 35 36 #ifndef _DRM_H_ 37 #define _DRM_H_ 38 39 #if defined(__linux__) 40 41 #include <linux/types.h> 42 #include <asm/ioctl.h> 43 typedef unsigned int drm_handle_t; 44 45 #else /* One of the BSDs */ 46 47 #include <sys/ioccom.h> 48 #include <sys/types.h> 49 typedef int8_t __s8; 50 typedef uint8_t __u8; 51 typedef int16_t __s16; 52 typedef uint16_t __u16; 53 typedef int32_t __s32; 54 typedef uint32_t __u32; 55 typedef int64_t __s64; 56 typedef uint64_t __u64; 57 typedef size_t __kernel_size_t; 58 #if defined(__SOLARIS__) || defined(__sun) 59 #include <sys/types32.h> 60 typedef unsigned long long drm_handle_t; 61 #else /* __SOLARIS__ or __sun */ 62 typedef unsigned long drm_handle_t; 63 #endif /* __SOLARIS__ or __sun */ 64 65 #endif /* One of the BSDs */ 66 67 #if defined(__cplusplus) 68 extern "C" { 69 #endif 70 71 /* Solaris-specific. */ 72 #if defined(__SOLARIS__) || defined(__sun) 73 74 #define _IOC_NRBITS 8 75 #define _IOC_TYPEBITS 8 76 #define _IOC_SIZEBITS 14 77 #define _IOC_DIRBITS 2 78 79 #define _IOC_NRSHIFT 0 80 #define _IOC_TYPESHIFT (_IOC_NRSHIFT + _IOC_NRBITS) 81 #define _IOC_SIZESHIFT (_IOC_TYPESHIFT + _IOC_TYPEBITS) 82 #define _IOC_DIRSHIFT (_IOC_SIZESHIFT + _IOC_SIZEBITS) 83 84 #define _IOC(dir, type, nr, size) \ 85 (((dir) /* already shifted */) | \ 86 ((type) << _IOC_TYPESHIFT) | \ 87 ((nr) << _IOC_NRSHIFT) | \ 88 ((size) << _IOC_SIZESHIFT)) 89 90 #endif /* __Solaris__ or __sun */ 91 92 #define DRM_NAME "drm" /**< Name in kernel, /dev, and /proc */ 93 #define DRM_MIN_ORDER 5 /**< At least 2^5 bytes = 32 bytes */ 94 #define DRM_MAX_ORDER 22 /**< Up to 2^22 bytes = 4MB */ 95 #define DRM_RAM_PERCENT 10 /**< How much system ram can we lock? */ 96 97 #define _DRM_LOCK_HELD 0x80000000U /**< Hardware lock is held */ 98 #define _DRM_LOCK_CONT 0x40000000U /**< Hardware lock is contended */ 99 #define _DRM_LOCK_IS_HELD(lock) ((lock) & _DRM_LOCK_HELD) 100 #define _DRM_LOCK_IS_CONT(lock) ((lock) & _DRM_LOCK_CONT) 101 #define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD|_DRM_LOCK_CONT)) 102 103 typedef unsigned int drm_context_t; 104 typedef unsigned int drm_drawable_t; 105 typedef unsigned int drm_magic_t; 106 107 /** 108 * Cliprect. 109 * 110 * \warning: If you change this structure, make sure you change 111 * XF86DRIClipRectRec in the server as well 112 * 113 * \note KW: Actually it's illegal to change either for 114 * backwards-compatibility reasons. 115 */ 116 struct drm_clip_rect { 117 unsigned short x1; 118 unsigned short y1; 119 unsigned short x2; 120 unsigned short y2; 121 }; 122 123 /** 124 * Drawable information. 125 */ 126 struct drm_drawable_info { 127 unsigned int num_rects; 128 struct drm_clip_rect *rects; 129 }; 130 131 /** 132 * Texture region, 133 */ 134 struct drm_tex_region { 135 unsigned char next; 136 unsigned char prev; 137 unsigned char in_use; 138 unsigned char padding; 139 unsigned int age; 140 }; 141 142 /** 143 * Hardware lock. 144 * 145 * The lock structure is a simple cache-line aligned integer. To avoid 146 * processor bus contention on a multiprocessor system, there should not be any 147 * other data stored in the same cache line. 148 */ 149 struct drm_hw_lock { 150 __volatile__ unsigned int lock; /**< lock variable */ 151 char padding[60]; /**< Pad to cache line */ 152 }; 153 154 /** 155 * DRM_IOCTL_VERSION ioctl argument type. 156 * 157 * \sa drmGetVersion(). 158 */ 159 struct drm_version { 160 int version_major; /**< Major version */ 161 int version_minor; /**< Minor version */ 162 int version_patchlevel; /**< Patch level */ 163 __kernel_size_t name_len; /**< Length of name buffer */ 164 char *name; /**< Name of driver */ 165 __kernel_size_t date_len; /**< Length of date buffer */ 166 char *date; /**< User-space buffer to hold date */ 167 __kernel_size_t desc_len; /**< Length of desc buffer */ 168 char *desc; /**< User-space buffer to hold desc */ 169 }; 170 171 /** 172 * DRM_IOCTL_GET_UNIQUE ioctl argument type. 173 * 174 * \sa drmGetBusid() and drmSetBusId(). 175 */ 176 struct drm_unique { 177 __kernel_size_t unique_len; /**< Length of unique */ 178 char *unique; /**< Unique name for driver instantiation */ 179 }; 180 181 struct drm_list { 182 int count; /**< Length of user-space structures */ 183 struct drm_version *version; 184 }; 185 186 struct drm_block { 187 int unused; 188 }; 189 190 /** 191 * DRM_IOCTL_CONTROL ioctl argument type. 192 * 193 * \sa drmCtlInstHandler() and drmCtlUninstHandler(). 194 */ 195 struct drm_control { 196 enum { 197 DRM_ADD_COMMAND, 198 DRM_RM_COMMAND, 199 DRM_INST_HANDLER, 200 DRM_UNINST_HANDLER 201 } func; 202 int irq; 203 }; 204 205 /** 206 * Type of memory to map. 207 */ 208 enum drm_map_type { 209 _DRM_FRAME_BUFFER = 0, /**< WC (no caching), no core dump */ 210 _DRM_REGISTERS = 1, /**< no caching, no core dump */ 211 _DRM_SHM = 2, /**< shared, cached */ 212 _DRM_AGP = 3, /**< AGP/GART */ 213 _DRM_SCATTER_GATHER = 4, /**< Scatter/gather memory for PCI DMA */ 214 _DRM_CONSISTENT = 5, /**< Consistent memory for PCI DMA */ 215 _DRM_GEM = 6 /**< GEM object (XXX: Not libdrm?) */ 216 }; 217 218 /** 219 * Memory mapping flags. 220 */ 221 enum drm_map_flags { 222 _DRM_RESTRICTED = 0x01, /**< Cannot be mapped to user-virtual */ 223 _DRM_READ_ONLY = 0x02, 224 _DRM_LOCKED = 0x04, /**< shared, cached, locked */ 225 _DRM_KERNEL = 0x08, /**< kernel requires access */ 226 _DRM_WRITE_COMBINING = 0x10, /**< use write-combining if available */ 227 _DRM_CONTAINS_LOCK = 0x20, /**< SHM page that contains lock */ 228 _DRM_REMOVABLE = 0x40, /**< Removable mapping */ 229 _DRM_DRIVER = 0x80 /**< Managed by driver */ 230 }; 231 232 struct drm_ctx_priv_map { 233 unsigned int ctx_id; /**< Context requesting private mapping */ 234 void *handle; /**< Handle of map */ 235 }; 236 237 /** 238 * DRM_IOCTL_GET_MAP, DRM_IOCTL_ADD_MAP and DRM_IOCTL_RM_MAP ioctls 239 * argument type. 240 * 241 * \sa drmAddMap(). 242 */ 243 struct drm_map { 244 unsigned long long offset; /**< Requested physical address (0 for SAREA)*/ 245 unsigned long long handle; 246 /**< User-space: "Handle" to pass to mmap() */ 247 /**< Kernel-space: kernel-virtual address */ 248 unsigned long size; /**< Requested physical size (bytes) */ 249 enum drm_map_type type; /**< Type of memory to map */ 250 enum drm_map_flags flags; /**< Flags */ 251 int mtrr; /**< MTRR slot used */ 252 /* Private data */ 253 }; 254 255 /** 256 * DRM_IOCTL_GET_CLIENT ioctl argument type. 257 */ 258 struct drm_client { 259 int idx; /**< Which client desired? */ 260 int auth; /**< Is client authenticated? */ 261 unsigned long pid; /**< Process ID */ 262 unsigned long uid; /**< User ID */ 263 unsigned long magic; /**< Magic */ 264 unsigned long iocs; /**< Ioctl count */ 265 }; 266 267 enum drm_stat_type { 268 _DRM_STAT_LOCK, 269 _DRM_STAT_OPENS, 270 _DRM_STAT_CLOSES, 271 _DRM_STAT_IOCTLS, 272 _DRM_STAT_LOCKS, 273 _DRM_STAT_UNLOCKS, 274 _DRM_STAT_VALUE, /**< Generic value */ 275 _DRM_STAT_BYTE, /**< Generic byte counter (1024bytes/K) */ 276 _DRM_STAT_COUNT, /**< Generic non-byte counter (1000/k) */ 277 278 _DRM_STAT_IRQ, /**< IRQ */ 279 _DRM_STAT_PRIMARY, /**< Primary DMA bytes */ 280 _DRM_STAT_SECONDARY, /**< Secondary DMA bytes */ 281 _DRM_STAT_DMA, /**< DMA */ 282 _DRM_STAT_SPECIAL, /**< Special DMA (e.g., priority or polled) */ 283 _DRM_STAT_MISSED /**< Missed DMA opportunity */ 284 /* Add to the *END* of the list */ 285 }; 286 287 /** 288 * DRM_IOCTL_GET_STATS ioctl argument type. 289 */ 290 struct drm_stats { 291 unsigned long count; 292 struct { 293 unsigned long value; 294 enum drm_stat_type type; 295 } data[15]; 296 }; 297 298 /** 299 * Hardware locking flags. 300 */ 301 enum drm_lock_flags { 302 _DRM_LOCK_READY = 0x01, /**< Wait until hardware is ready for DMA */ 303 _DRM_LOCK_QUIESCENT = 0x02, /**< Wait until hardware quiescent */ 304 _DRM_LOCK_FLUSH = 0x04, /**< Flush this context's DMA queue first */ 305 _DRM_LOCK_FLUSH_ALL = 0x08, /**< Flush all DMA queues first */ 306 /* These *HALT* flags aren't supported yet 307 -- they will be used to support the 308 full-screen DGA-like mode. */ 309 _DRM_HALT_ALL_QUEUES = 0x10, /**< Halt all current and future queues */ 310 _DRM_HALT_CUR_QUEUES = 0x20 /**< Halt all current queues */ 311 }; 312 313 /** 314 * DRM_IOCTL_LOCK, DRM_IOCTL_UNLOCK and DRM_IOCTL_FINISH ioctl argument type. 315 * 316 * \sa drmGetLock() and drmUnlock(). 317 */ 318 struct drm_lock { 319 int context; 320 enum drm_lock_flags flags; 321 }; 322 323 /** 324 * DMA flags 325 * 326 * \warning 327 * These values \e must match xf86drm.h. 328 * 329 * \sa drm_dma. 330 */ 331 enum drm_dma_flags { 332 /* Flags for DMA buffer dispatch */ 333 _DRM_DMA_BLOCK = 0x01, /**< 334 * Block until buffer dispatched. 335 * 336 * \note The buffer may not yet have 337 * been processed by the hardware -- 338 * getting a hardware lock with the 339 * hardware quiescent will ensure 340 * that the buffer has been 341 * processed. 342 */ 343 _DRM_DMA_WHILE_LOCKED = 0x02, /**< Dispatch while lock held */ 344 _DRM_DMA_PRIORITY = 0x04, /**< High priority dispatch */ 345 346 /* Flags for DMA buffer request */ 347 _DRM_DMA_WAIT = 0x10, /**< Wait for free buffers */ 348 _DRM_DMA_SMALLER_OK = 0x20, /**< Smaller-than-requested buffers OK */ 349 _DRM_DMA_LARGER_OK = 0x40 /**< Larger-than-requested buffers OK */ 350 }; 351 352 /** 353 * DRM_IOCTL_ADD_BUFS and DRM_IOCTL_MARK_BUFS ioctl argument type. 354 * 355 * \sa drmAddBufs(). 356 */ 357 358 typedef enum { 359 _DRM_PAGE_ALIGN = 0x01, /**< Align on page boundaries for DMA */ 360 _DRM_AGP_BUFFER = 0x02, /**< Buffer is in AGP space */ 361 _DRM_SG_BUFFER = 0x04, /**< Scatter/gather memory buffer */ 362 _DRM_FB_BUFFER = 0x08, /**< Buffer is in frame buffer */ 363 _DRM_PCI_BUFFER_RO = 0x10 /**< Map PCI DMA buffer read-only */ 364 } drm_buf_flag; 365 366 367 struct drm_buf_desc { 368 int count; /**< Number of buffers of this size */ 369 int size; /**< Size in bytes */ 370 int low_mark; /**< Low water mark */ 371 int high_mark; /**< High water mark */ 372 drm_buf_flag flags; 373 unsigned long agp_start; /**< 374 * Start address of where the AGP buffers are 375 * in the AGP aperture 376 */ 377 }; 378 379 /** 380 * DRM_IOCTL_INFO_BUFS ioctl argument type. 381 */ 382 struct drm_buf_info { 383 int count; /**< Entries in list */ 384 struct drm_buf_desc *list; 385 }; 386 387 /** 388 * DRM_IOCTL_FREE_BUFS ioctl argument type. 389 */ 390 struct drm_buf_free { 391 int count; 392 int *list; 393 }; 394 395 /** 396 * Buffer information 397 * 398 * \sa drm_buf_map. 399 */ 400 struct drm_buf_pub { 401 int idx; /**< Index into the master buffer list */ 402 int total; /**< Buffer size */ 403 int used; /**< Amount of buffer in use (for DMA) */ 404 void *address; /**< Address of buffer */ 405 }; 406 407 /** 408 * DRM_IOCTL_MAP_BUFS ioctl argument type. 409 */ 410 struct drm_buf_map { 411 int count; /**< Length of the buffer list */ 412 #ifdef __cplusplus 413 void *virt; 414 #else 415 void *virtual; /**< Mmap'd area in user-virtual */ 416 #endif 417 struct drm_buf_pub *list; /**< Buffer information */ 418 int fd; 419 }; 420 421 /** 422 * DRM_IOCTL_DMA ioctl argument type. 423 * 424 * Indices here refer to the offset into the buffer list in drm_buf_get. 425 * 426 * \sa drmDMA(). 427 */ 428 struct drm_dma { 429 int context; /**< Context handle */ 430 int send_count; /**< Number of buffers to send */ 431 int *send_indices; /**< List of handles to buffers */ 432 int *send_sizes; /**< Lengths of data to send */ 433 enum drm_dma_flags flags; /**< Flags */ 434 int request_count; /**< Number of buffers requested */ 435 int request_size; /**< Desired size for buffers */ 436 int *request_indices; /**< Buffer information */ 437 int *request_sizes; 438 int granted_count; /**< Number of buffers granted */ 439 }; 440 441 enum drm_ctx_flags { 442 _DRM_CONTEXT_PRESERVED = 0x01, 443 _DRM_CONTEXT_2DONLY = 0x02 444 }; 445 446 /** 447 * DRM_IOCTL_ADD_CTX ioctl argument type. 448 * 449 * \sa drmCreateContext() and drmDestroyContext(). 450 */ 451 struct drm_ctx { 452 drm_context_t handle; 453 enum drm_ctx_flags flags; 454 }; 455 456 /** 457 * DRM_IOCTL_RES_CTX ioctl argument type. 458 */ 459 struct drm_ctx_res { 460 int count; 461 struct drm_ctx *contexts; 462 }; 463 464 /** 465 * DRM_IOCTL_ADD_DRAW and DRM_IOCTL_RM_DRAW ioctl argument type. 466 */ 467 struct drm_draw { 468 drm_drawable_t handle; 469 }; 470 471 /** 472 * DRM_IOCTL_UPDATE_DRAW ioctl argument type. 473 */ 474 typedef enum { 475 DRM_DRAWABLE_CLIPRECTS 476 } drm_drawable_info_type_t; 477 478 struct drm_update_draw { 479 drm_drawable_t handle; 480 unsigned int type; 481 unsigned int num; 482 unsigned long long data; 483 }; 484 485 /** 486 * DRM_IOCTL_GET_MAGIC and DRM_IOCTL_AUTH_MAGIC ioctl argument type. 487 */ 488 struct drm_auth { 489 drm_magic_t magic; 490 }; 491 492 /** 493 * DRM_IOCTL_IRQ_BUSID ioctl argument type. 494 * 495 * \sa drmGetInterruptFromBusID(). 496 */ 497 struct drm_irq_busid { 498 int irq; /**< IRQ number */ 499 int busnum; /**< bus number */ 500 int devnum; /**< device number */ 501 int funcnum; /**< function number */ 502 }; 503 504 enum drm_vblank_seq_type { 505 _DRM_VBLANK_ABSOLUTE = 0x0, /**< Wait for specific vblank sequence number */ 506 _DRM_VBLANK_RELATIVE = 0x1, /**< Wait for given number of vblanks */ 507 /* bits 1-6 are reserved for high crtcs */ 508 _DRM_VBLANK_HIGH_CRTC_MASK = 0x0000003e, 509 _DRM_VBLANK_EVENT = 0x4000000, /**< Send event instead of blocking */ 510 _DRM_VBLANK_FLIP = 0x8000000, /**< Scheduled buffer swap should flip */ 511 _DRM_VBLANK_NEXTONMISS = 0x10000000, /**< If missed, wait for next vblank */ 512 _DRM_VBLANK_SECONDARY = 0x20000000, /**< Secondary display controller */ 513 _DRM_VBLANK_SIGNAL = 0x40000000 /**< Send signal instead of blocking, unsupported */ 514 }; 515 #define _DRM_VBLANK_HIGH_CRTC_SHIFT 1 516 517 #define _DRM_VBLANK_TYPES_MASK (_DRM_VBLANK_ABSOLUTE | _DRM_VBLANK_RELATIVE) 518 #define _DRM_VBLANK_FLAGS_MASK (_DRM_VBLANK_EVENT | _DRM_VBLANK_SIGNAL | \ 519 _DRM_VBLANK_SECONDARY | _DRM_VBLANK_NEXTONMISS) 520 521 struct drm_wait_vblank_request { 522 enum drm_vblank_seq_type type; 523 unsigned int sequence; 524 unsigned long signal; 525 }; 526 527 struct drm_wait_vblank_reply { 528 enum drm_vblank_seq_type type; 529 unsigned int sequence; 530 long tval_sec; 531 long tval_usec; 532 }; 533 534 /** 535 * DRM_IOCTL_WAIT_VBLANK ioctl argument type. 536 * 537 * \sa drmWaitVBlank(). 538 */ 539 union drm_wait_vblank { 540 struct drm_wait_vblank_request request; 541 struct drm_wait_vblank_reply reply; 542 }; 543 544 #define _DRM_PRE_MODESET 1 545 #define _DRM_POST_MODESET 2 546 547 /** 548 * DRM_IOCTL_MODESET_CTL ioctl argument type 549 * 550 * \sa drmModesetCtl(). 551 */ 552 struct drm_modeset_ctl { 553 __u32 crtc; 554 __u32 cmd; 555 }; 556 557 /** 558 * DRM_IOCTL_AGP_ENABLE ioctl argument type. 559 * 560 * \sa drmAgpEnable(). 561 */ 562 struct drm_agp_mode { 563 unsigned long mode; /**< AGP mode */ 564 }; 565 566 /** 567 * DRM_IOCTL_AGP_ALLOC and DRM_IOCTL_AGP_FREE ioctls argument type. 568 * 569 * \sa drmAgpAlloc() and drmAgpFree(). 570 */ 571 struct drm_agp_buffer { 572 unsigned long size; /**< In bytes -- will round to page boundary */ 573 unsigned long handle; /**< Used for binding / unbinding */ 574 unsigned long type; /**< Type of memory to allocate */ 575 unsigned long physical; /**< Physical used by i810 */ 576 }; 577 578 /** 579 * DRM_IOCTL_AGP_BIND and DRM_IOCTL_AGP_UNBIND ioctls argument type. 580 * 581 * \sa drmAgpBind() and drmAgpUnbind(). 582 */ 583 struct drm_agp_binding { 584 unsigned long handle; /**< From drm_agp_buffer */ 585 unsigned long offset; /**< In bytes -- will round to page boundary */ 586 }; 587 588 /** 589 * DRM_IOCTL_AGP_INFO ioctl argument type. 590 * 591 * \sa drmAgpVersionMajor(), drmAgpVersionMinor(), drmAgpGetMode(), 592 * drmAgpBase(), drmAgpSize(), drmAgpMemoryUsed(), drmAgpMemoryAvail(), 593 * drmAgpVendorId() and drmAgpDeviceId(). 594 */ 595 struct drm_agp_info { 596 int agp_version_major; 597 int agp_version_minor; 598 unsigned long mode; 599 unsigned long aperture_base; /* physical address */ 600 unsigned long aperture_size; /* bytes */ 601 unsigned long memory_allowed; /* bytes */ 602 unsigned long memory_used; 603 604 /* PCI information */ 605 unsigned short id_vendor; 606 unsigned short id_device; 607 }; 608 609 /** 610 * DRM_IOCTL_SG_ALLOC ioctl argument type. 611 */ 612 struct drm_scatter_gather { 613 unsigned long size; /**< In bytes -- will round to page boundary */ 614 unsigned long handle; /**< Used for mapping / unmapping */ 615 }; 616 617 /** 618 * DRM_IOCTL_SET_VERSION ioctl argument type. 619 */ 620 struct drm_set_version { 621 int drm_di_major; 622 int drm_di_minor; 623 int drm_dd_major; 624 int drm_dd_minor; 625 }; 626 627 /** DRM_IOCTL_GEM_CLOSE ioctl argument type */ 628 struct drm_gem_close { 629 /** Handle of the object to be closed. */ 630 __u32 handle; 631 __u32 pad; 632 }; 633 634 /** DRM_IOCTL_GEM_FLINK ioctl argument type */ 635 struct drm_gem_flink { 636 /** Handle for the object being named */ 637 __u32 handle; 638 639 /** Returned global name */ 640 __u32 name; 641 }; 642 643 /** DRM_IOCTL_GEM_OPEN ioctl argument type */ 644 struct drm_gem_open { 645 /** Name of object being opened */ 646 __u32 name; 647 648 /** Returned handle for the object */ 649 __u32 handle; 650 651 /** Returned size of the object */ 652 __u64 size; 653 }; 654 655 #define DRM_CAP_DUMB_BUFFER 0x1 656 #define DRM_CAP_VBLANK_HIGH_CRTC 0x2 657 #define DRM_CAP_DUMB_PREFERRED_DEPTH 0x3 658 #define DRM_CAP_DUMB_PREFER_SHADOW 0x4 659 #define DRM_CAP_PRIME 0x5 660 #define DRM_PRIME_CAP_IMPORT 0x1 661 #define DRM_PRIME_CAP_EXPORT 0x2 662 #define DRM_CAP_TIMESTAMP_MONOTONIC 0x6 663 #define DRM_CAP_ASYNC_PAGE_FLIP 0x7 664 /* 665 * The CURSOR_WIDTH and CURSOR_HEIGHT capabilities return a valid widthxheight 666 * combination for the hardware cursor. The intention is that a hardware 667 * agnostic userspace can query a cursor plane size to use. 668 * 669 * Note that the cross-driver contract is to merely return a valid size; 670 * drivers are free to attach another meaning on top, eg. i915 returns the 671 * maximum plane size. 672 */ 673 #define DRM_CAP_CURSOR_WIDTH 0x8 674 #define DRM_CAP_CURSOR_HEIGHT 0x9 675 #define DRM_CAP_ADDFB2_MODIFIERS 0x10 676 #define DRM_CAP_PAGE_FLIP_TARGET 0x11 677 678 /** DRM_IOCTL_GET_CAP ioctl argument type */ 679 struct drm_get_cap { 680 __u64 capability; 681 __u64 value; 682 }; 683 684 /** 685 * DRM_CLIENT_CAP_STEREO_3D 686 * 687 * if set to 1, the DRM core will expose the stereo 3D capabilities of the 688 * monitor by advertising the supported 3D layouts in the flags of struct 689 * drm_mode_modeinfo. 690 */ 691 #define DRM_CLIENT_CAP_STEREO_3D 1 692 693 /** 694 * DRM_CLIENT_CAP_UNIVERSAL_PLANES 695 * 696 * If set to 1, the DRM core will expose all planes (overlay, primary, and 697 * cursor) to userspace. 698 */ 699 #define DRM_CLIENT_CAP_UNIVERSAL_PLANES 2 700 701 /** 702 * DRM_CLIENT_CAP_ATOMIC 703 * 704 * If set to 1, the DRM core will expose atomic properties to userspace 705 */ 706 #define DRM_CLIENT_CAP_ATOMIC 3 707 708 /** DRM_IOCTL_SET_CLIENT_CAP ioctl argument type */ 709 struct drm_set_client_cap { 710 __u64 capability; 711 __u64 value; 712 }; 713 714 #define DRM_RDWR O_RDWR 715 #define DRM_CLOEXEC O_CLOEXEC 716 struct drm_prime_handle { 717 __u32 handle; 718 719 /** Flags.. only applicable for handle->fd */ 720 __u32 flags; 721 722 /** Returned dmabuf file descriptor */ 723 __s32 fd; 724 }; 725 726 #if defined(__cplusplus) 727 } 728 #endif 729 730 #include "drm_mode.h" 731 732 #if defined(__cplusplus) 733 extern "C" { 734 #endif 735 736 #define DRM_IOCTL_BASE 'd' 737 #define DRM_IO(nr) _IO(DRM_IOCTL_BASE,nr) 738 #define DRM_IOR(nr,type) _IOR(DRM_IOCTL_BASE,nr,type) 739 #define DRM_IOW(nr,type) _IOW(DRM_IOCTL_BASE,nr,type) 740 #define DRM_IOWR(nr,type) _IOWR(DRM_IOCTL_BASE,nr,type) 741 742 #define DRM_IOCTL_VERSION DRM_IOWR(0x00, struct drm_version) 743 #define DRM_IOCTL_GET_UNIQUE DRM_IOWR(0x01, struct drm_unique) 744 #define DRM_IOCTL_GET_MAGIC DRM_IOR( 0x02, struct drm_auth) 745 #define DRM_IOCTL_IRQ_BUSID DRM_IOWR(0x03, struct drm_irq_busid) 746 #define DRM_IOCTL_GET_MAP DRM_IOWR(0x04, struct drm_map) 747 #define DRM_IOCTL_GET_CLIENT DRM_IOWR(0x05, struct drm_client) 748 #define DRM_IOCTL_GET_STATS DRM_IOR( 0x06, struct drm_stats) 749 #define DRM_IOCTL_SET_VERSION DRM_IOWR(0x07, struct drm_set_version) 750 #define DRM_IOCTL_MODESET_CTL DRM_IOW(0x08, struct drm_modeset_ctl) 751 #define DRM_IOCTL_GEM_CLOSE DRM_IOW (0x09, struct drm_gem_close) 752 #define DRM_IOCTL_GEM_FLINK DRM_IOWR(0x0a, struct drm_gem_flink) 753 #define DRM_IOCTL_GEM_OPEN DRM_IOWR(0x0b, struct drm_gem_open) 754 #define DRM_IOCTL_GET_CAP DRM_IOWR(0x0c, struct drm_get_cap) 755 #define DRM_IOCTL_SET_CLIENT_CAP DRM_IOW( 0x0d, struct drm_set_client_cap) 756 757 #define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, struct drm_unique) 758 #define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, struct drm_auth) 759 #define DRM_IOCTL_BLOCK DRM_IOWR(0x12, struct drm_block) 760 #define DRM_IOCTL_UNBLOCK DRM_IOWR(0x13, struct drm_block) 761 #define DRM_IOCTL_CONTROL DRM_IOW( 0x14, struct drm_control) 762 #define DRM_IOCTL_ADD_MAP DRM_IOWR(0x15, struct drm_map) 763 #define DRM_IOCTL_ADD_BUFS DRM_IOWR(0x16, struct drm_buf_desc) 764 #define DRM_IOCTL_MARK_BUFS DRM_IOW( 0x17, struct drm_buf_desc) 765 #define DRM_IOCTL_INFO_BUFS DRM_IOWR(0x18, struct drm_buf_info) 766 #define DRM_IOCTL_MAP_BUFS DRM_IOWR(0x19, struct drm_buf_map) 767 #define DRM_IOCTL_FREE_BUFS DRM_IOW( 0x1a, struct drm_buf_free) 768 769 #define DRM_IOCTL_RM_MAP DRM_IOW( 0x1b, struct drm_map) 770 771 #define DRM_IOCTL_SET_SAREA_CTX DRM_IOW( 0x1c, struct drm_ctx_priv_map) 772 #define DRM_IOCTL_GET_SAREA_CTX DRM_IOWR(0x1d, struct drm_ctx_priv_map) 773 774 #define DRM_IOCTL_SET_MASTER DRM_IO(0x1e) 775 #define DRM_IOCTL_DROP_MASTER DRM_IO(0x1f) 776 777 #define DRM_IOCTL_ADD_CTX DRM_IOWR(0x20, struct drm_ctx) 778 #define DRM_IOCTL_RM_CTX DRM_IOWR(0x21, struct drm_ctx) 779 #define DRM_IOCTL_MOD_CTX DRM_IOW( 0x22, struct drm_ctx) 780 #define DRM_IOCTL_GET_CTX DRM_IOWR(0x23, struct drm_ctx) 781 #define DRM_IOCTL_SWITCH_CTX DRM_IOW( 0x24, struct drm_ctx) 782 #define DRM_IOCTL_NEW_CTX DRM_IOW( 0x25, struct drm_ctx) 783 #define DRM_IOCTL_RES_CTX DRM_IOWR(0x26, struct drm_ctx_res) 784 #define DRM_IOCTL_ADD_DRAW DRM_IOWR(0x27, struct drm_draw) 785 #define DRM_IOCTL_RM_DRAW DRM_IOWR(0x28, struct drm_draw) 786 #define DRM_IOCTL_DMA DRM_IOWR(0x29, struct drm_dma) 787 #define DRM_IOCTL_LOCK DRM_IOW( 0x2a, struct drm_lock) 788 #define DRM_IOCTL_UNLOCK DRM_IOW( 0x2b, struct drm_lock) 789 #define DRM_IOCTL_FINISH DRM_IOW( 0x2c, struct drm_lock) 790 791 #define DRM_IOCTL_PRIME_HANDLE_TO_FD DRM_IOWR(0x2d, struct drm_prime_handle) 792 #define DRM_IOCTL_PRIME_FD_TO_HANDLE DRM_IOWR(0x2e, struct drm_prime_handle) 793 794 #define DRM_IOCTL_AGP_ACQUIRE DRM_IO( 0x30) 795 #define DRM_IOCTL_AGP_RELEASE DRM_IO( 0x31) 796 #define DRM_IOCTL_AGP_ENABLE DRM_IOW( 0x32, struct drm_agp_mode) 797 #define DRM_IOCTL_AGP_INFO DRM_IOR( 0x33, struct drm_agp_info) 798 #define DRM_IOCTL_AGP_ALLOC DRM_IOWR(0x34, struct drm_agp_buffer) 799 #define DRM_IOCTL_AGP_FREE DRM_IOW( 0x35, struct drm_agp_buffer) 800 #define DRM_IOCTL_AGP_BIND DRM_IOW( 0x36, struct drm_agp_binding) 801 #define DRM_IOCTL_AGP_UNBIND DRM_IOW( 0x37, struct drm_agp_binding) 802 803 #define DRM_IOCTL_SG_ALLOC DRM_IOWR(0x38, struct drm_scatter_gather) 804 #define DRM_IOCTL_SG_FREE DRM_IOW( 0x39, struct drm_scatter_gather) 805 806 #define DRM_IOCTL_WAIT_VBLANK DRM_IOWR(0x3a, union drm_wait_vblank) 807 808 #define DRM_IOCTL_UPDATE_DRAW DRM_IOW(0x3f, struct drm_update_draw) 809 810 #define DRM_IOCTL_MODE_GETRESOURCES DRM_IOWR(0xA0, struct drm_mode_card_res) 811 #define DRM_IOCTL_MODE_GETCRTC DRM_IOWR(0xA1, struct drm_mode_crtc) 812 #define DRM_IOCTL_MODE_SETCRTC DRM_IOWR(0xA2, struct drm_mode_crtc) 813 #define DRM_IOCTL_MODE_CURSOR DRM_IOWR(0xA3, struct drm_mode_cursor) 814 #define DRM_IOCTL_MODE_GETGAMMA DRM_IOWR(0xA4, struct drm_mode_crtc_lut) 815 #define DRM_IOCTL_MODE_SETGAMMA DRM_IOWR(0xA5, struct drm_mode_crtc_lut) 816 #define DRM_IOCTL_MODE_GETENCODER DRM_IOWR(0xA6, struct drm_mode_get_encoder) 817 #define DRM_IOCTL_MODE_GETCONNECTOR DRM_IOWR(0xA7, struct drm_mode_get_connector) 818 #define DRM_IOCTL_MODE_ATTACHMODE DRM_IOWR(0xA8, struct drm_mode_mode_cmd) /* deprecated (never worked) */ 819 #define DRM_IOCTL_MODE_DETACHMODE DRM_IOWR(0xA9, struct drm_mode_mode_cmd) /* deprecated (never worked) */ 820 821 #define DRM_IOCTL_MODE_GETPROPERTY DRM_IOWR(0xAA, struct drm_mode_get_property) 822 #define DRM_IOCTL_MODE_SETPROPERTY DRM_IOWR(0xAB, struct drm_mode_connector_set_property) 823 #define DRM_IOCTL_MODE_GETPROPBLOB DRM_IOWR(0xAC, struct drm_mode_get_blob) 824 #define DRM_IOCTL_MODE_GETFB DRM_IOWR(0xAD, struct drm_mode_fb_cmd) 825 #define DRM_IOCTL_MODE_ADDFB DRM_IOWR(0xAE, struct drm_mode_fb_cmd) 826 #define DRM_IOCTL_MODE_RMFB DRM_IOWR(0xAF, unsigned int) 827 #define DRM_IOCTL_MODE_PAGE_FLIP DRM_IOWR(0xB0, struct drm_mode_crtc_page_flip) 828 #define DRM_IOCTL_MODE_DIRTYFB DRM_IOWR(0xB1, struct drm_mode_fb_dirty_cmd) 829 830 #define DRM_IOCTL_MODE_CREATE_DUMB DRM_IOWR(0xB2, struct drm_mode_create_dumb) 831 #define DRM_IOCTL_MODE_MAP_DUMB DRM_IOWR(0xB3, struct drm_mode_map_dumb) 832 #define DRM_IOCTL_MODE_DESTROY_DUMB DRM_IOWR(0xB4, struct drm_mode_destroy_dumb) 833 #define DRM_IOCTL_MODE_GETPLANERESOURCES DRM_IOWR(0xB5, struct drm_mode_get_plane_res) 834 #define DRM_IOCTL_MODE_GETPLANE DRM_IOWR(0xB6, struct drm_mode_get_plane) 835 #define DRM_IOCTL_MODE_SETPLANE DRM_IOWR(0xB7, struct drm_mode_set_plane) 836 #define DRM_IOCTL_MODE_ADDFB2 DRM_IOWR(0xB8, struct drm_mode_fb_cmd2) 837 #define DRM_IOCTL_MODE_OBJ_GETPROPERTIES DRM_IOWR(0xB9, struct drm_mode_obj_get_properties) 838 #define DRM_IOCTL_MODE_OBJ_SETPROPERTY DRM_IOWR(0xBA, struct drm_mode_obj_set_property) 839 #define DRM_IOCTL_MODE_CURSOR2 DRM_IOWR(0xBB, struct drm_mode_cursor2) 840 #define DRM_IOCTL_MODE_ATOMIC DRM_IOWR(0xBC, struct drm_mode_atomic) 841 #define DRM_IOCTL_MODE_CREATEPROPBLOB DRM_IOWR(0xBD, struct drm_mode_create_blob) 842 #define DRM_IOCTL_MODE_DESTROYPROPBLOB DRM_IOWR(0xBE, struct drm_mode_destroy_blob) 843 844 /** 845 * Device specific ioctls should only be in their respective headers 846 * The device specific ioctl range is from 0x40 to 0x9f. 847 * Generic IOCTLS restart at 0xA0. 848 * 849 * \sa drmCommandNone(), drmCommandRead(), drmCommandWrite(), and 850 * drmCommandReadWrite(). 851 */ 852 #define DRM_COMMAND_BASE 0x40 853 #define DRM_COMMAND_END 0xA0 854 855 /** 856 * Header for events written back to userspace on the drm fd. The 857 * type defines the type of event, the length specifies the total 858 * length of the event (including the header), and user_data is 859 * typically a 64 bit value passed with the ioctl that triggered the 860 * event. A read on the drm fd will always only return complete 861 * events, that is, if for example the read buffer is 100 bytes, and 862 * there are two 64 byte events pending, only one will be returned. 863 * 864 * Event types 0 - 0x7fffffff are generic drm events, 0x80000000 and 865 * up are chipset specific. 866 */ 867 struct drm_event { 868 __u32 type; 869 __u32 length; 870 }; 871 872 #define DRM_EVENT_VBLANK 0x01 873 #define DRM_EVENT_FLIP_COMPLETE 0x02 874 875 struct drm_event_vblank { 876 struct drm_event base; 877 __u64 user_data; 878 __u32 tv_sec; 879 __u32 tv_usec; 880 __u32 sequence; 881 __u32 reserved; 882 }; 883 884 /* typedef area */ 885 typedef struct drm_clip_rect drm_clip_rect_t; 886 typedef struct drm_drawable_info drm_drawable_info_t; 887 typedef struct drm_tex_region drm_tex_region_t; 888 typedef struct drm_hw_lock drm_hw_lock_t; 889 typedef struct drm_version drm_version_t; 890 typedef struct drm_unique drm_unique_t; 891 typedef struct drm_list drm_list_t; 892 typedef struct drm_block drm_block_t; 893 typedef struct drm_control drm_control_t; 894 typedef enum drm_map_type drm_map_type_t; 895 typedef enum drm_map_flags drm_map_flags_t; 896 typedef struct drm_ctx_priv_map drm_ctx_priv_map_t; 897 typedef struct drm_map drm_map_t; 898 typedef struct drm_client drm_client_t; 899 typedef enum drm_stat_type drm_stat_type_t; 900 typedef struct drm_stats drm_stats_t; 901 typedef enum drm_lock_flags drm_lock_flags_t; 902 typedef struct drm_lock drm_lock_t; 903 typedef enum drm_dma_flags drm_dma_flags_t; 904 typedef struct drm_buf_desc drm_buf_desc_t; 905 typedef struct drm_buf_info drm_buf_info_t; 906 typedef struct drm_buf_free drm_buf_free_t; 907 typedef struct drm_buf_pub drm_buf_pub_t; 908 typedef struct drm_buf_map drm_buf_map_t; 909 typedef struct drm_dma drm_dma_t; 910 typedef union drm_wait_vblank drm_wait_vblank_t; 911 typedef struct drm_agp_mode drm_agp_mode_t; 912 typedef enum drm_ctx_flags drm_ctx_flags_t; 913 typedef struct drm_ctx drm_ctx_t; 914 typedef struct drm_ctx_res drm_ctx_res_t; 915 typedef struct drm_draw drm_draw_t; 916 typedef struct drm_update_draw drm_update_draw_t; 917 typedef struct drm_auth drm_auth_t; 918 typedef struct drm_irq_busid drm_irq_busid_t; 919 typedef enum drm_vblank_seq_type drm_vblank_seq_type_t; 920 921 typedef struct drm_agp_buffer drm_agp_buffer_t; 922 typedef struct drm_agp_binding drm_agp_binding_t; 923 typedef struct drm_agp_info drm_agp_info_t; 924 typedef struct drm_scatter_gather drm_scatter_gather_t; 925 typedef struct drm_set_version drm_set_version_t; 926 927 #if defined(__cplusplus) 928 } 929 #endif 930 931 #endif 932