Searched defs:reg (Results 1 - 25 of 346) sorted by relevance

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/illumos-gate/usr/src/lib/libc/sparc/gen/
H A Dgetctxt.c42 greg_t *reg; local
55 reg = ucp->uc_mcontext.gregs;
56 reg[REG_SP] = getfp();
57 reg[REG_O7] = caller();
58 reg[REG_PC] = reg[REG_O7] + 8;
59 reg[REG_nPC] = reg[REG_PC] + 4;
60 reg[REG_O0] = 0;
H A Dswapctxt.c42 greg_t *reg; local
54 reg = oucp->uc_mcontext.gregs;
55 reg[REG_SP] = getfp();
56 reg[REG_O7] = caller();
57 reg[REG_PC] = reg[REG_O7] + 8;
58 reg[REG_nPC] = reg[REG_PC] + 4;
59 reg[REG_O0] = 0;
H A Dsiglongjmp.c47 greg_t *reg = uc.uc_mcontext.gregs; local
62 _fetch_globals(&reg[REG_G1]);
65 reg[REG_PC] = bp->sjs_pc;
66 reg[REG_nPC] = reg[REG_PC] + 0x4;
67 reg[REG_SP] = bp->sjs_sp;
75 reg[REG_O0] = (greg_t)val;
77 reg[REG_O0] = (greg_t)1;
H A Dmakectxt.c57 greg_t *reg; local
64 reg = ucp->uc_mcontext.gregs;
65 reg[REG_PC] = (greg_t)func;
66 reg[REG_nPC] = reg[REG_PC] + 0x4;
96 *tsp++ = reg[REG_O0 + argno] = va_arg(ap, long);
103 reg[REG_SP] = (greg_t)sp - STACK_BIAS; /* sp (when done) */
104 reg[REG_O7] = (greg_t)resumecontext - 8; /* return pc */
110 greg_t *reg; local
117 reg
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/illumos-gate/usr/src/lib/libc/sparcv9/gen/
H A Dgetctxt.c42 greg_t *reg; local
55 reg = ucp->uc_mcontext.gregs;
56 reg[REG_SP] = getfp();
57 reg[REG_O7] = caller();
58 reg[REG_PC] = reg[REG_O7] + 8;
59 reg[REG_nPC] = reg[REG_PC] + 4;
60 reg[REG_O0] = 0;
H A Dswapctxt.c42 greg_t *reg; local
54 reg = oucp->uc_mcontext.gregs;
55 reg[REG_SP] = getfp();
56 reg[REG_O7] = caller();
57 reg[REG_PC] = reg[REG_O7] + 8;
58 reg[REG_nPC] = reg[REG_PC] + 4;
59 reg[REG_O0] = 0;
H A Dsiglongjmp.c46 greg_t *reg = uc.uc_mcontext.gregs; local
61 _fetch_globals(&reg[REG_G1]);
64 reg[REG_PC] = bp->sjs_pc;
65 reg[REG_nPC] = reg[REG_PC] + 0x4;
66 reg[REG_SP] = bp->sjs_sp;
67 reg[REG_ASI] = bp->sjs_asi;
68 reg[REG_FPRS] = bp->sjs_fprs;
76 reg[REG_O0] = (greg_t)val;
78 reg[REG_O
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H A Dmakectxt.c57 greg_t *reg; local
64 reg = ucp->uc_mcontext.gregs;
65 reg[REG_PC] = (greg_t)func;
66 reg[REG_nPC] = reg[REG_PC] + 0x4;
96 *tsp++ = reg[REG_O0 + argno] = va_arg(ap, long);
103 reg[REG_SP] = (greg_t)sp - STACK_BIAS; /* sp (when done) */
104 reg[REG_O7] = (greg_t)resumecontext - 8; /* return pc */
110 greg_t *reg; local
117 reg
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/illumos-gate/usr/src/uts/common/io/ixgbe/
H A Dixgbe_osdep.c33 ixgbe_read_pci_cfg(struct ixgbe_hw *hw, uint32_t reg) argument
35 return (pci_config_get16(OS_DEP(hw)->cfg_handle, reg));
39 ixgbe_write_pci_cfg(struct ixgbe_hw *hw, uint32_t reg, uint32_t val) argument
41 pci_config_put16(OS_DEP(hw)->cfg_handle, reg, val);
/illumos-gate/usr/src/cmd/vgrind/
H A Dretest.c23 char reg[132]; local
32 scanf ("%s", reg);
33 ireg = convexp(reg);
/illumos-gate/usr/src/cmd/basename/
H A Dbasename.c50 regex_t reg; local
143 r = regcomp(&reg, suf_pat, 0);
150 r = regexec(&reg, string, 2, pmatch, 0);
/illumos-gate/usr/src/uts/i86pc/os/
H A Dpci_mech1.c41 * 5.3.1.2: dev=31 func=7 reg=0 means a special cycle. We don't want to
48 pci_mech1_getb(int bus, int device, int function, int reg) argument
57 outl(PCI_CONFADD, PCI_CADDR1(bus, device, function, reg));
58 val = inb(PCI_CONFDATA | (reg & 0x3));
64 pci_mech1_getw(int bus, int device, int function, int reg) argument
74 outl(PCI_CONFADD, PCI_CADDR1(bus, device, function, reg));
75 val = inw(PCI_CONFDATA | (reg & 0x2));
81 pci_mech1_getl(int bus, int device, int function, int reg) argument
91 outl(PCI_CONFADD, PCI_CADDR1(bus, device, function, reg));
98 pci_mech1_putb(int bus, int device, int function, int reg, uint8_ argument
112 pci_mech1_putw(int bus, int device, int function, int reg, uint16_t val) argument
126 pci_mech1_putl(int bus, int device, int function, int reg, uint32_t val) argument
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H A Dpci_mech1_amd.c88 * 5.3.1.2: dev=31 func=7 reg=0 means a special cycle. We don't want to
95 pci_mech1_amd_getb(int bus, int device, int function, int reg) argument
105 outl(PCI_CONFADD, PCI_CADDR1_ECS(bus, device, function, reg));
106 val = inb(PCI_CONFDATA | (reg & 0x3));
112 pci_mech1_amd_getw(int bus, int device, int function, int reg) argument
122 outl(PCI_CONFADD, PCI_CADDR1_ECS(bus, device, function, reg));
123 val = inw(PCI_CONFDATA | (reg & 0x2));
129 pci_mech1_amd_getl(int bus, int device, int function, int reg) argument
139 outl(PCI_CONFADD, PCI_CADDR1_ECS(bus, device, function, reg));
146 pci_mech1_amd_putb(int bus, int device, int function, int reg, uint8_ argument
160 pci_mech1_amd_putw(int bus, int device, int function, int reg, uint16_t val) argument
174 pci_mech1_amd_putl(int bus, int device, int function, int reg, uint32_t val) argument
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H A Dpci_mech2.c73 pci_mech2_getb(int bus, int device, int function, int reg) argument
82 val = inb(PCI_CADDR2(device, reg));
89 pci_mech2_getw(int bus, int device, int function, int reg) argument
98 val = inw(PCI_CADDR2(device, reg));
105 pci_mech2_getl(int bus, int device, int function, int reg) argument
114 val = inl(PCI_CADDR2(device, reg));
121 pci_mech2_putb(int bus, int device, int function, int reg, uint8_t val) argument
129 outb(PCI_CADDR2(device, reg), val);
134 pci_mech2_putw(int bus, int device, int function, int reg, uint16_t val) argument
142 outw(PCI_CADDR2(device, reg), va
147 pci_mech2_putl(int bus, int device, int function, int reg, uint32_t val) argument
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H A Dpci_neptune.c140 pci_neptune_getb(int bus, int device, int function, int reg) argument
146 val = pci_mech1_getb(bus, device, function, reg);
153 pci_neptune_getw(int bus, int device, int function, int reg) argument
159 val = pci_mech1_getw(bus, device, function, reg);
166 pci_neptune_getl(int bus, int device, int function, int reg) argument
172 val = pci_mech1_getl(bus, device, function, reg);
179 pci_neptune_putb(int bus, int device, int function, int reg, uint8_t val) argument
183 pci_mech1_putb(bus, device, function, reg, val);
189 pci_neptune_putw(int bus, int device, int function, int reg, uint16_t val) argument
193 pci_mech1_putw(bus, device, function, reg, va
199 pci_neptune_putl(int bus, int device, int function, int reg, uint32_t val) argument
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H A Dmach_kdi.c67 kdi_dreg_get(int reg) argument
69 switch (reg) {
83 panic("invalid debug register dr%d", reg);
89 kdi_dreg_set(int reg, ulong_t value) argument
91 switch (reg) {
111 panic("invalid debug register dr%d", reg);
/illumos-gate/usr/src/lib/libast/common/comp/
H A Dfnmatch.c36 int reg; /* regex flag */ member in struct:__anon2721
62 reflags |= mp->reg;
/illumos-gate/usr/src/uts/common/io/usb/hcd/xhci/
H A Dxhci_intr.c105 uint32_t reg; local
107 reg = xhci_get32(xhcip, XHCI_R_RUN, XHCI_IMAN(0));
108 reg |= XHCI_IMAN_INTR_ENA;
109 xhci_put32(xhcip, XHCI_R_RUN, XHCI_IMAN(0), reg);
113 reg = xhci_get32(xhcip, XHCI_R_OPER, XHCI_USBCMD);
114 reg |= XHCI_CMD_INTE;
115 xhci_put32(xhcip, XHCI_R_OPER, XHCI_USBCMD, reg);
/illumos-gate/usr/src/lib/libslp/javalib/com/sun/slp/
H A DPermSARegTable.java73 void reg(ServiceURL URL, CSrvReg sr) { method in class:PermSARegTable
97 private void send(SrvLocMsg reg) { argument
101 Transact.transactTCPMsg(addr, reg, true);
/illumos-gate/usr/src/lib/libdtrace/common/
H A Ddt_regset.c78 int reg; local
80 for (reg = 0; reg < drp->dr_size; reg++) {
81 if (BT_TEST(drp->dr_bitmap, reg) != 0) {
82 dt_dprintf("%%r%d was left allocated\n", reg);
110 int reg; local
114 reg = (int)((wx << BT_ULSHIFT) | bx);
115 BT_SET(drp->dr_bitmap, reg);
116 return (reg);
127 dt_regset_free(dt_regset_t *drp, int reg) argument
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/illumos-gate/usr/src/cmd/mdb/i86pc/modules/common/
H A Dapic_common.c39 apic_ioapic_read(int ioapic_ix, uint32_t reg) argument
44 ioapic[APIC_IO_REG] = reg;
56 int reg; local
89 mdb_printf("%4s %8s %8s\n", "reg", "high", " low");
90 for (reg = 0; reg <= reg_max; reg++) {
93 high = APIC_READ_IOAPIC_RDT_ENTRY_HIGH_DWORD(i, reg);
94 low = APIC_READ_IOAPIC_RDT_ENTRY_LOW_DWORD(i, reg);
96 mdb_printf("%2d %8x %8x\n", reg, hig
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/illumos-gate/usr/src/uts/common/io/dmfe/
H A Ddmfe_log.c73 uint32_t reg; local
89 reg = dmfe_chip_get32(dmfep, 8*i);
90 cmn_err(CE_NOTE, "!%s: CR%d\t%08x", dmfep->ifname, i, reg);
/illumos-gate/usr/src/uts/common/io/atge/
H A Datge_mii.c64 atge_mii_read(void *arg, uint8_t phy, uint8_t reg) argument
73 MDIO_SUP_PREAMBLE | MDIO_CLK_25_4 | MDIO_REG_ADDR(reg));
86 phy, reg);
97 if (reg == MII_STATUS)
99 else if (reg == MII_EXTSTATUS)
107 atge_mii_write(void *arg, uint8_t phy, uint8_t reg, uint16_t val) argument
117 MDIO_SUP_PREAMBLE | MDIO_CLK_25_4 | MDIO_REG_ADDR(reg));
129 atge_error(atgep->atge_dip, "PHY (%d) write timeout:reg %d,"
130 " val :%d", phy, reg, val);
187 uint16_t reg, p local
272 uint16_t reg; local
350 atge_l1c_mii_read(void *arg, uint8_t phy, uint8_t reg) argument
362 atge_l1c_mii_write(void *arg, uint8_t phy, uint8_t reg, uint16_t val) argument
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/illumos-gate/usr/src/uts/i86pc/cpu/amd_opteron/
H A Dao_cpu.c62 ao_pcicfg_write(uint_t procnodeid, uint_t func, uint_t reg, uint32_t val) argument
66 ASSERT((reg & 3) == 0 && reg < 256);
68 cmi_pci_putl(0, procnodeid + 24, func, reg, 0, val);
72 ao_pcicfg_read(uint_t procnodeid, uint_t func, uint_t reg) argument
76 ASSERT((reg & 3) == 0 && reg < 256);
78 return (cmi_pci_getl(0, procnodeid + 24, func, reg, 0, 0));
/illumos-gate/usr/src/uts/common/io/
H A Dsock_conf.c71 smod_register(const smod_reg_t *reg) argument
79 if (reg->smod_version != SOCKMOD_VERSION ||
80 reg->smod_dc_version != SOCK_DC_VERSION ||
81 reg->smod_uc_version != SOCK_UC_VERSION) {
84 reg->smod_name);
90 if ((smodp = smod_find(reg->smod_name)) != NULL) {
97 smodp = smod_create(reg->smod_name);
98 smodp->smod_version = reg->smod_version;
103 ASSERT(reg->__smod_priv != NULL);
105 reg
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