Searched defs:reg (Results 1 - 25 of 1122) sorted by relevance

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/freebsd-head/sys/arm/freescale/imx/
H A Dimx6_pl310.c54 uint32_t reg; local
61 reg = pl310_read4(sc, PL310_POWER_CTRL);
62 reg |= POWER_CTRL_ENABLE_GATING | POWER_CTRL_ENABLE_STANDBY;
63 pl310_write4(sc, PL310_POWER_CTRL, reg);
/freebsd-head/contrib/gdb/gdb/regformats/
H A Dregdef.h24 struct reg struct
44 void set_register_cache (struct reg *regs, int n);
/freebsd-head/sys/dev/rtwn/rtl8192c/usb/
H A Dr92cu_led.c57 uint8_t reg; local
60 reg = rtwn_read_1(sc, R92C_LEDCFG0) & 0x70;
62 reg |= R92C_LEDCFG0_DIS;
63 rtwn_write_1(sc, R92C_LEDCFG0, reg);
/freebsd-head/sys/arm/mv/armada38x/
H A Darmada38x_pl310.c52 uint32_t reg; local
58 reg = pl310_read4(sc, PL310_POWER_CTRL);
59 reg |= POWER_CTRL_ENABLE_GATING;
60 pl310_write4(sc, PL310_POWER_CTRL, reg);
/freebsd-head/sys/dev/rtwn/rtl8188e/
H A Dr88e_init.c63 uint32_t reg; local
67 reg = rtwn_bb_read(sc, R92C_AFE_XTAL_CTRL);
69 RW(reg, R92C_AFE_XTAL_CTRL_ADDR, val | val << 6));
/freebsd-head/lib/libproc/
H A Dproc_regs.c47 proc_regget(struct proc_handle *phdl, proc_reg_t reg, unsigned long *regvalue) argument
49 struct reg regs;
59 switch (reg) {
95 DPRINTFX("ERROR: no support for reg number %d", reg);
103 proc_regset(struct proc_handle *phdl, proc_reg_t reg, unsigned long regvalue) argument
105 struct reg regs;
114 switch (reg) {
150 DPRINTFX("ERROR: no support for reg number %d", reg);
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/freebsd-head/contrib/gdb/gdb/
H A Dax-gdb.h65 because the subexpression's value lives in a register; u.reg is
88 int reg; member in union:axs_value::__anon1348
/freebsd-head/sys/arm64/acpica/
H A Dpci_cfgreg.c47 pci_cfgregread(int bus, int slot, int func, int reg, int bytes) argument
59 pci_cfgregwrite(int bus, int slot, int func, int reg, u_int32_t data, int bytes) argument
/freebsd-head/contrib/wpa/src/wps/
H A Dwps_upnp_ap.c22 struct wps_registrar *reg = timeout_ctx; local
25 wps_registrar_selected_registrar_changed(reg, 0);
29 int upnp_er_set_selected_registrar(struct wps_registrar *reg, argument
41 s->reg = reg;
42 eloop_cancel_timeout(upnp_er_set_selected_timeout, s, reg);
67 upnp_er_set_selected_timeout, s, reg);
70 wps_registrar_selected_registrar_changed(reg, 0);
76 void upnp_er_remove_notification(struct wps_registrar *reg, argument
80 eloop_cancel_timeout(upnp_er_set_selected_timeout, s, reg);
[all...]
/freebsd-head/lib/libc/aarch64/sys/
H A D__vdso_gettc.c43 uint64_t reg; local
45 __asm __volatile("mrs %0, cntvct_el0" : "=r" (reg));
46 return (reg);
52 uint64_t reg; local
54 __asm __volatile("mrs %0, cntpct_el0" : "=r" (reg));
55 return (reg);
/freebsd-head/sys/dev/rtwn/rtl8192c/
H A Dr92c_rf.c60 uint32_t reg[R92C_MAX_CHAINS], val; local
62 reg[0] = rtwn_bb_read(sc, R92C_HSSI_PARAM2(0));
64 reg[chain] = rtwn_bb_read(sc, R92C_HSSI_PARAM2(chain));
67 reg[0] & ~R92C_HSSI_PARAM2_READ_EDGE);
71 RW(reg[chain], R92C_HSSI_PARAM2_READ_ADDR, addr) |
76 reg[0] | R92C_HSSI_PARAM2_READ_EDGE);
/freebsd-head/sys/arm/qemu/
H A Dvirt_mp.c53 virt_start_ap(u_int id, phandle_t node, u_int addr_cells, pcell_t *reg) argument
61 err = psci_cpu_on(*reg, pmap_kextract((vm_offset_t)mpentry), id);
/freebsd-head/sys/contrib/ncsw/Peripherals/FM/MAC/
H A Dmemac_mii_acc.c47 uint8_t reg,
57 reg,
65 uint8_t reg,
75 reg,
45 MEMAC_MII_WritePhyReg(t_Handle h_Memac, uint8_t phyAddr, uint8_t reg, uint16_t data) argument
63 MEMAC_MII_ReadPhyReg(t_Handle h_Memac, uint8_t phyAddr, uint8_t reg, uint16_t *p_Data) argument
H A Dtgec_mii_acc.c47 uint8_t reg,
71 WRITE_UINT32(p_MiiAccess->mdio_regaddr, reg);
91 uint8_t reg,
115 WRITE_UINT32(p_MiiAccess->mdio_regaddr, reg);
135 ("Read Error: phyAddr 0x%x, dev 0x%x, reg 0x%x, cfgStatusReg 0x%x",
136 ((phyAddr & 0xe0)>>5), (phyAddr & 0x1f), reg, cfgStatusReg));
45 TGEC_MII_WritePhyReg(t_Handle h_Tgec, uint8_t phyAddr, uint8_t reg, uint16_t data) argument
89 TGEC_MII_ReadPhyReg(t_Handle h_Tgec, uint8_t phyAddr, uint8_t reg, uint16_t *p_Data) argument
H A Ddtsec_mii_acc.c50 uint8_t reg,
64 err = (t_Error)fman_dtsec_mii_write_reg(miiregs, phyAddr, reg, data, dtsec_freq);
72 uint8_t reg,
86 err = fman_dtsec_mii_read_reg(miiregs, phyAddr, reg, p_Data, dtsec_freq);
90 ("Read wrong data (0xffff): phyAddr 0x%x, reg 0x%x",
91 phyAddr, reg));
48 DTSEC_MII_WritePhyReg(t_Handle h_Dtsec, uint8_t phyAddr, uint8_t reg, uint16_t data) argument
70 DTSEC_MII_ReadPhyReg(t_Handle h_Dtsec, uint8_t phyAddr, uint8_t reg, uint16_t *p_Data) argument
H A Dfman_dtsec_mii_acc.c92 uint8_t reg, uint16_t data, uint16_t dtsec_freq)
107 tmp = (uint32_t)((addr << MIIMADD_PHY_ADDR_SHIFT) | reg);
126 uint8_t reg, uint16_t *data, uint16_t dtsec_freq)
135 tmp = (uint32_t)((addr << MIIMADD_PHY_ADDR_SHIFT) | reg);
91 fman_dtsec_mii_write_reg(struct dtsec_mii_reg *regs, uint8_t addr, uint8_t reg, uint16_t data, uint16_t dtsec_freq) argument
125 fman_dtsec_mii_read_reg(struct dtsec_mii_reg *regs, uint8_t addr, uint8_t reg, uint16_t *data, uint16_t dtsec_freq) argument
/freebsd-head/lib/libc/arm/sys/
H A D__vdso_gettc.c47 uint64_t reg; local
49 __asm __volatile("mrrc\tp15, 1, %Q0, %R0, c14" : "=r" (reg));
50 return (reg);
56 uint64_t reg; local
58 __asm __volatile("mrrc\tp15, 0, %Q0, %R0, c14" : "=r" (reg));
59 return (reg);
/freebsd-head/sys/dev/rtwn/rtl8188e/pci/
H A Dr88ee_init.c162 uint8_t reg; local
246 reg = rtwn_read_1(sc, R92C_RSV_CTRL + 1);
247 rtwn_write_1(sc, R92C_RSV_CTRL + 1, reg & ~0x08);
248 rtwn_write_1(sc, R92C_RSV_CTRL + 1, reg | 0x08);
/freebsd-head/contrib/llvm-project/llvm/lib/Target/Sparc/MCTargetDesc/
H A DSparcTargetStreamer.cpp28 void SparcTargetAsmStreamer::emitSparcRegisterIgnore(unsigned reg) { argument
30 << "%" << StringRef(SparcInstPrinter::getRegisterName(reg)).lower()
34 void SparcTargetAsmStreamer::emitSparcRegisterScratch(unsigned reg) { argument
36 << "%" << StringRef(SparcInstPrinter::getRegisterName(reg)).lower()
/freebsd-head/sys/riscv/include/
H A Dreg.h40 struct reg { struct
54 uint64_t fp_fcsr; /* Floating point control reg */
65 int fill_regs(struct thread *, struct reg *);
66 int set_regs(struct thread *, struct reg *);
/freebsd-head/sys/mips/ingenic/
H A Djz4780_dwc_fdt.c145 uint32_t reg; local
147 reg = bus_read_4(res, JZ_DWC2_GUSBCFG);
148 reg |= 0xc;
149 bus_write_4(res, JZ_DWC2_GUSBCFG, reg);
/freebsd-head/sys/dev/rtwn/rtl8192c/pci/
H A Dr92ce_init.c114 uint32_t reg; local
196 reg = rtwn_read_1(sc, R92C_GPIO_IO_SEL);
197 if (!(reg & R92C_GPIO_IO_SEL_RFKILL)) {
/freebsd-head/sys/dev/rtwn/rtl8821a/
H A Dr21a_init.c325 uint32_t reg; local
329 reg = rtwn_bb_read(sc, R92C_MAC_PHY_CTRL);
330 reg = RW(reg, R21A_MAC_PHY_CRYSTALCAP, val | (val << 6));
331 rtwn_bb_write(sc, R92C_MAC_PHY_CTRL, reg);
/freebsd-head/sys/arm/altera/socfpga/
H A Dsocfpga_machdep.c110 _socfpga_cpu_reset(bus_size_t reg) argument
116 if (rstmgr_warmreset(reg) == 0)
123 if ((OF_getencprop(node, "reg", &paddr, sizeof(paddr))) > 0) {
126 reg, CTRL_SWWARMRSTREQ);
/freebsd-head/sys/dev/fdt/
H A Dfdt_arm_platform.c77 fdt_platform_maxid(u_int id, phandle_t node, u_int addr_cells, pcell_t *reg) argument

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