1 /*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21 /*
22 * Copyright (c) 2005, 2010, Oracle and/or its affiliates. All rights reserved.
23 */
24
25 /*
26 * Internal PCI Fast DVMA implementation
27 */
28 #include <sys/types.h>
29 #include <sys/kmem.h>
30 #include <sys/async.h>
31 #include <sys/sysmacros.h>
32 #include <sys/sunddi.h>
33 #include <sys/ddi_impldefs.h>
34 #include <sys/dvma.h>
35 #include "px_obj.h"
36
37 /*LINTLIBRARY*/
38
39 static struct dvma_ops fdvma_ops;
40 typedef struct fast_dvma fdvma_t;
41
42 /*
43 * The following routines are used to implement the sun4u fast dvma
44 * routines on this bus.
45 */
46
47 /*ARGSUSED*/
48 static void
px_fdvma_load(ddi_dma_handle_t h,caddr_t a,uint_t len,uint_t index,ddi_dma_cookie_t * cp)49 px_fdvma_load(ddi_dma_handle_t h, caddr_t a, uint_t len, uint_t index,
50 ddi_dma_cookie_t *cp)
51 {
52 ddi_dma_impl_t *mp = (ddi_dma_impl_t *)h;
53 fdvma_t *fdvma_p = (fdvma_t *)mp->dmai_fdvma;
54 px_t *px_p = (px_t *)fdvma_p->softsp;
55 px_mmu_t *mmu_p = px_p->px_mmu_p;
56 dev_info_t *dip = px_p->px_dip;
57 px_dvma_addr_t dvma_addr, dvma_pg;
58 uint32_t offset;
59 size_t npages, pg_index;
60 io_attributes_t attr;
61
62 offset = (uint32_t)(uintptr_t)a & MMU_PAGE_OFFSET;
63 npages = MMU_BTOPR(len + offset);
64 if (!npages)
65 return;
66
67 /* make sure we don't exceed reserved boundary */
68 DBG(DBG_FAST_DVMA, dip, "load index=%x: %p+%x ", index, a, len);
69 if (index + npages > mp->dmai_ndvmapages) {
70 cmn_err(px_panic_on_fatal_errors ? CE_PANIC : CE_WARN,
71 "%s%d: kaddr_load index(%x)+pgs(%lx) exceeds limit\n",
72 ddi_driver_name(dip), ddi_get_instance(dip),
73 index, npages);
74 return;
75 }
76 fdvma_p->pagecnt[index] = npages;
77
78 dvma_addr = mp->dmai_mapping + MMU_PTOB(index);
79 dvma_pg = MMU_BTOP(dvma_addr);
80 pg_index = dvma_pg - mmu_p->dvma_base_pg;
81
82 /* construct the dma cookie to be returned */
83 MAKE_DMA_COOKIE(cp, dvma_addr | offset, len);
84 DBG(DBG_FAST_DVMA | DBG_CONT, dip, "cookie: %x+%x\n",
85 cp->dmac_address, cp->dmac_size);
86
87 attr = PX_GET_TTE_ATTR(mp->dmai_rflags, mp->dmai_attr.dma_attr_flags);
88
89 if (px_lib_iommu_map(dip, PCI_TSBID(0, pg_index), npages,
90 PX_ADD_ATTR_EXTNS(attr, mp->dmai_bdf), (void *)a, 0,
91 MMU_MAP_BUF) != DDI_SUCCESS) {
92 cmn_err(CE_WARN, "%s%d: kaddr_load can't get "
93 "page frame for vaddr %lx", ddi_driver_name(dip),
94 ddi_get_instance(dip), (uintptr_t)a);
95 }
96 }
97
98 /*ARGSUSED*/
99 static void
px_fdvma_unload(ddi_dma_handle_t h,uint_t index,uint_t sync_flag)100 px_fdvma_unload(ddi_dma_handle_t h, uint_t index, uint_t sync_flag)
101 {
102 ddi_dma_impl_t *mp = (ddi_dma_impl_t *)h;
103 fdvma_t *fdvma_p = (fdvma_t *)mp->dmai_fdvma;
104 px_t *px_p = (px_t *)fdvma_p->softsp;
105 size_t npages = fdvma_p->pagecnt[index];
106 px_dvma_addr_t dvma_pg = MMU_BTOP(mp->dmai_mapping + MMU_PTOB(index));
107
108 DBG(DBG_FAST_DVMA, px_p->px_dip,
109 "unload index=%x sync_flag=%x %x+%x+%x\n", index, sync_flag,
110 mp->dmai_mapping, MMU_PTOB(index), MMU_PTOB(npages));
111
112 px_mmu_unmap_pages(px_p->px_mmu_p, mp, dvma_pg, npages);
113 fdvma_p->pagecnt[index] = 0;
114 }
115
116 /*ARGSUSED*/
117 static void
px_fdvma_sync(ddi_dma_handle_t h,uint_t index,uint_t sync_flag)118 px_fdvma_sync(ddi_dma_handle_t h, uint_t index, uint_t sync_flag)
119 {
120 ddi_dma_impl_t *mp = (ddi_dma_impl_t *)h;
121 fdvma_t *fdvma_p = (fdvma_t *)mp->dmai_fdvma;
122 px_t *px_p = (px_t *)fdvma_p->softsp;
123 size_t npg = fdvma_p->pagecnt[index];
124
125 DBG(DBG_FAST_DVMA, px_p->px_dip,
126 "sync index=%x sync_flag=%x %x+%x+%x\n", index, sync_flag,
127 mp->dmai_mapping, MMU_PTOB(index), MMU_PTOB(npg));
128 }
129
130 int
px_fdvma_reserve(dev_info_t * dip,dev_info_t * rdip,px_t * px_p,ddi_dma_req_t * dmareq,ddi_dma_handle_t * handlep)131 px_fdvma_reserve(dev_info_t *dip, dev_info_t *rdip, px_t *px_p,
132 ddi_dma_req_t *dmareq, ddi_dma_handle_t *handlep)
133 {
134 fdvma_t *fdvma_p;
135 px_dvma_addr_t dvma_pg;
136 px_mmu_t *mmu_p = px_p->px_mmu_p;
137 size_t npages;
138 ddi_dma_impl_t *mp;
139 ddi_dma_lim_t *lim_p = dmareq->dmar_limits;
140 ulong_t hi = lim_p->dlim_addr_hi;
141 ulong_t lo = lim_p->dlim_addr_lo;
142 size_t counter_max = (lim_p->dlim_cntr_max + 1) & MMU_PAGE_MASK;
143
144 if (px_disable_fdvma)
145 return (DDI_FAILURE);
146
147 DBG(DBG_DMA_CTL, dip, "DDI_DMA_RESERVE: rdip=%s%d\n",
148 ddi_driver_name(rdip), ddi_get_instance(rdip));
149
150 /*
151 * Check the limit structure.
152 */
153 if ((lo >= hi) || (hi < mmu_p->mmu_dvma_base))
154 return (DDI_DMA_BADLIMITS);
155
156 /*
157 * Allocate DVMA space from reserve.
158 */
159 npages = dmareq->dmar_object.dmao_size;
160 if ((long)atomic_add_long_nv(&mmu_p->mmu_dvma_reserve, -npages) < 0) {
161 atomic_add_long(&mmu_p->mmu_dvma_reserve, npages);
162 return (DDI_DMA_NORESOURCES);
163 }
164
165 /*
166 * Allocate the dma handle.
167 */
168 mp = kmem_zalloc(sizeof (px_dma_hdl_t), KM_SLEEP);
169
170 /*
171 * Get entries from dvma space map.
172 * (vmem_t *vmp,
173 * size_t size, size_t align, size_t phase,
174 * size_t nocross, void *minaddr, void *maxaddr, int vmflag)
175 */
176 dvma_pg = MMU_BTOP((ulong_t)vmem_xalloc(mmu_p->mmu_dvma_map,
177 MMU_PTOB(npages), MMU_PAGE_SIZE, 0,
178 counter_max, (void *)lo, (void *)(hi + 1),
179 dmareq->dmar_fp == DDI_DMA_SLEEP ? VM_SLEEP : VM_NOSLEEP));
180 if (dvma_pg == 0) {
181 atomic_add_long(&mmu_p->mmu_dvma_reserve, npages);
182 kmem_free(mp, sizeof (px_dma_hdl_t));
183 return (DDI_DMA_NOMAPPING);
184 }
185
186 /*
187 * Create the fast dvma request structure.
188 */
189 fdvma_p = kmem_alloc(sizeof (fdvma_t), KM_SLEEP);
190 fdvma_p->pagecnt = kmem_alloc(npages * sizeof (uint_t), KM_SLEEP);
191 fdvma_p->ops = &fdvma_ops;
192 fdvma_p->softsp = (caddr_t)px_p;
193 fdvma_p->sync_flag = NULL;
194
195 /*
196 * Initialize the handle.
197 */
198 mp->dmai_rdip = rdip;
199 mp->dmai_rflags = DMP_BYPASSNEXUS | DDI_DMA_READ | DMP_NOSYNC;
200 mp->dmai_burstsizes = dmareq->dmar_limits->dlim_burstsizes;
201 mp->dmai_mapping = MMU_PTOB(dvma_pg);
202 mp->dmai_ndvmapages = npages;
203 mp->dmai_size = npages * MMU_PAGE_SIZE;
204 mp->dmai_nwin = 0;
205 mp->dmai_fdvma = (caddr_t)fdvma_p;
206
207 /*
208 * The bdf protection value is set to immediate child
209 * at first. It gets modified by switch/bridge drivers
210 * as the code traverses down the fabric topology.
211 *
212 * XXX No IOMMU protection for broken devices.
213 */
214 ASSERT((intptr_t)ddi_get_parent_data(rdip) >> 1 == 0);
215 mp->dmai_bdf = ((intptr_t)ddi_get_parent_data(rdip) == 1) ?
216 PCIE_INVALID_BDF : pcie_get_bdf_for_dma_xfer(dip, rdip);
217
218 DBG(DBG_DMA_CTL, dip,
219 "DDI_DMA_RESERVE: mp=%p dvma=%x npages=%x private=%p\n",
220 mp, mp->dmai_mapping, npages, fdvma_p);
221 *handlep = (ddi_dma_handle_t)mp;
222 return (DDI_SUCCESS);
223 }
224
225 int
px_fdvma_release(dev_info_t * dip,px_t * px_p,ddi_dma_impl_t * mp)226 px_fdvma_release(dev_info_t *dip, px_t *px_p, ddi_dma_impl_t *mp)
227 {
228 px_mmu_t *mmu_p = px_p->px_mmu_p;
229 size_t npages;
230 fdvma_t *fdvma_p = (fdvma_t *)mp->dmai_fdvma;
231
232 if (px_disable_fdvma)
233 return (DDI_FAILURE);
234
235 /* validate fdvma handle */
236 if (!(mp->dmai_rflags & DMP_BYPASSNEXUS)) {
237 DBG(DBG_DMA_CTL, dip, "DDI_DMA_RELEASE: not fast dma\n");
238 return (DDI_FAILURE);
239 }
240
241 /* flush all reserved dvma addresses from mmu */
242 px_mmu_unmap_window(mmu_p, mp);
243
244 npages = mp->dmai_ndvmapages;
245 vmem_xfree(mmu_p->mmu_dvma_map, (void *)mp->dmai_mapping,
246 MMU_PTOB(npages));
247
248 atomic_add_long(&mmu_p->mmu_dvma_reserve, npages);
249 mp->dmai_ndvmapages = 0;
250
251 /* see if there is anyone waiting for dvma space */
252 if (mmu_p->mmu_dvma_clid != 0) {
253 DBG(DBG_DMA_CTL, dip, "run dvma callback\n");
254 ddi_run_callback(&mmu_p->mmu_dvma_clid);
255 }
256
257 /* free data structures */
258 kmem_free(fdvma_p->pagecnt, npages * sizeof (uint_t));
259 kmem_free(fdvma_p, sizeof (fdvma_t));
260 kmem_free(mp, sizeof (px_dma_hdl_t));
261
262 /* see if there is anyone waiting for kmem */
263 if (px_kmem_clid != 0) {
264 DBG(DBG_DMA_CTL, dip, "run handle callback\n");
265 ddi_run_callback(&px_kmem_clid);
266 }
267 return (DDI_SUCCESS);
268 }
269
270 static struct dvma_ops fdvma_ops = {
271 DVMAO_REV,
272 px_fdvma_load,
273 px_fdvma_unload,
274 px_fdvma_sync
275 };
276