xref: /illumos-gate/usr/src/uts/common/io/bfe/bfe.h (revision dd52495f)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 
22 /*
23  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 #ifndef _BFE_H
28 #define	_BFE_H
29 
30 #include "bfe_hw.h"
31 
32 #ifdef __cplusplus
33 	extern "C" {
34 #endif
35 
36 #define	BFE_SUCCESS	DDI_SUCCESS
37 #define	BFE_FAILURE	DDI_FAILURE
38 
39 #define	BFE_MAX_MULTICAST_TABLE	64
40 
41 #define	BFE_LINK_SPEED_10MBS	1
42 #define	BFE_LINK_SPEED_100MBS	2
43 
44 #define	VTAG_SIZE	4
45 
46 #define	BFE_MTU		ETHERMTU
47 
48 /*
49  * Use to increment descriptor slot number.
50  */
51 #define	BFE_INC_SLOT(i, p2) \
52 	(i = ((i + 1) & (p2 - 1)))
53 
54 #define	BFE_DEC_SLOT(i, p2) \
55 	(i = ((i + p2 - 1) % p2))
56 
57 /*
58  * I/O instructions
59  */
60 #define	OUTB(bfe, p, v)  \
61 	ddi_put8((bfe)->bfe_mem_regset.hdl, \
62 		(void *)((caddr_t)((bfe)->bfe_mem_regset.addr) + (p)), v)
63 
64 #define	OUTW(bfe, p, v)  \
65 	ddi_put16((bfe)->bfe_mem_regset.hdl, \
66 		(void *)((caddr_t)((bfe)->bfe_mem_regset.addr) + (p)), v)
67 
68 #define	OUTL(bfe, p, v)  \
69 	ddi_put32((bfe)->bfe_mem_regset.hdl, \
70 		(void *)((caddr_t)((bfe)->bfe_mem_regset.addr) + (p)), v)
71 
72 #define	INB(bfe, p)      \
73 	ddi_get8((bfe)->bfe_mem_regset.hdl, \
74 		(void *)(((caddr_t)(bfe)->bfe_mem_regset.addr) + (p)))
75 #define	INW(bfe, p)      \
76 	ddi_get16((bfe)->bfe_mem_regset.hdl, \
77 		(void *)(((caddr_t)(bfe)->bfe_mem_regset.addr) + (p)))
78 
79 #define	INL(bfe, p)      \
80 	ddi_get32((bfe)->bfe_mem_regset.hdl, \
81 		(void *)(((caddr_t)(bfe)->bfe_mem_regset.addr) + (p)))
82 
83 #define	FLUSH(bfe, reg) \
84 	(void) INL(bfe, reg)
85 
86 #define	OUTL_OR(bfe, reg, v) \
87 	OUTL(bfe, reg, (INL(bfe, reg) | v))
88 
89 #define	OUTL_AND(bfe, reg, v) \
90 	OUTL(bfe, reg, (INL(bfe, reg) & v))
91 
92 /*
93  * These macros allows use to write to descriptor memory.
94  */
95 #define	PUT_DESC(r, member, val)	\
96 	ddi_put32(r->r_desc_acc_handle, (member), (val))
97 
98 #define	GET_DESC(r, member)	\
99 	ddi_get32(r->r_desc_acc_handle, (member))
100 
101 typedef struct bfe_cards {
102 	uint16_t	vendor_id;
103 	uint16_t	device_id;
104 	char		*cardname;
105 } bfe_cards_t;
106 
107 
108 /*
109  * Chip's state.
110  */
111 typedef	enum {
112 	BFE_CHIP_UNINITIALIZED = 0,
113 	BFE_CHIP_INITIALIZED,
114 	BFE_CHIP_ACTIVE,
115 	BFE_CHIP_STOPPED,
116 	BFE_CHIP_HALT,
117 	BFE_CHIP_RESUME,
118 	BFE_CHIP_SUSPENDED,
119 	BFE_CHIP_QUIESCED
120 } bfe_chip_state_t;
121 
122 /*
123  * PHY state.
124  */
125 typedef	enum {
126 	BFE_PHY_STARTED = 1,
127 	BFE_PHY_STOPPED,
128 	BFE_PHY_RESET_DONE,
129 	BFE_PHY_RESET_TIMEOUT,
130 	BFE_PHY_NOTFOUND
131 } bfe_phy_state_t;
132 
133 /*
134  * Chip's mode
135  */
136 #define	BFE_RX_MODE_ENABLE	0x1
137 #define	BFE_RX_MODE_PROMISC	0x2
138 #define	BFE_RX_MODE_BROADCAST	0x4
139 #define	BFE_RX_MODE_ALLMULTI	0x8
140 
141 /*
142  * Every packet has this header which is put by the card.
143  */
144 typedef	struct	bfe_rx_header {
145 	uint16_t len;
146 	uint16_t flags;
147 	uint16_t pad[12];
148 } bfe_rx_header_t;
149 
150 typedef	struct bfe_stats {
151 	uint64_t	ether_stat_align_errors;
152 	uint64_t	ether_stat_carrier_errors;
153 	uint64_t	ether_stat_ex_collisions;
154 	uint64_t	ether_stat_fcs_errors;
155 	uint64_t	ether_stat_first_collisions;
156 	uint64_t	ether_stat_macrcv_errors;
157 	uint64_t	ether_stat_macxmt_errors;
158 	uint64_t	ether_stat_multi_collisions;
159 	uint64_t	ether_stat_toolong_errors;
160 	uint64_t	ether_stat_tooshort_errors;
161 	uint64_t	ether_stat_tx_late_collisions;
162 	uint64_t	ether_stat_defer_xmts;
163 	uint64_t	brdcstrcv;
164 	uint64_t	brdcstxmt;
165 	uint64_t	multixmt;
166 	uint64_t	collisions;
167 	uint64_t	ierrors;
168 	uint64_t	ipackets;
169 	uint64_t	multircv;
170 	uint64_t	norcvbuf;
171 	uint64_t	noxmtbuf;
172 	uint64_t	obytes;
173 	uint64_t	opackets;
174 	uint64_t	rbytes;
175 	uint64_t	underflows;
176 	uint64_t	overflows;
177 	uint64_t	txchecks;
178 	uint64_t	intr_claimed;
179 	uint64_t	intr_unclaimed;
180 	uint64_t	linkchanges;
181 	uint64_t	txcpybytes;
182 	uint64_t	txmapbytes;
183 	uint64_t	rxcpybytes;
184 	uint64_t	rxmapbytes;
185 	uint64_t	txreclaim0;
186 	uint64_t	txreclaims;
187 	uint32_t	txstalls;
188 	uint32_t	resets;
189 } bfe_stats_t;
190 
191 typedef struct {
192 	int	state;
193 	int	speed;
194 	int	duplex;
195 	int	flowctrl;
196 	int	mau;
197 } bfe_link_t;
198 
199 /*
200  * Device registers handle
201  */
202 typedef struct {
203 	ddi_acc_handle_t	hdl;
204 	caddr_t			addr;
205 } bfe_acc_t;
206 
207 /*
208  * BCM4401 Chip state
209  */
210 typedef struct bfe_chip {
211 	int		link;
212 	int		state;
213 	int		speed;
214 	int		duplex;
215 	uint32_t	bmsr;
216 	uint32_t	phyaddr;
217 } bfe_chip_t;
218 
219 
220 /*
221  * Ring Management framework.
222  */
223 
224 /*
225  * TX and RX descriptor format in the hardware.
226  */
227 typedef	struct bfe_desc {
228 	volatile uint32_t	desc_ctl;
229 	volatile uint32_t	desc_addr;
230 } bfe_desc_t;
231 
232 /*
233  * DMA handle for each descriptor
234  */
235 typedef struct bfe_dma {
236 	ddi_dma_handle_t	handle;
237 	ddi_acc_handle_t	acchdl;
238 	ddi_dma_cookie_t	cookie;
239 	caddr_t			addr;
240 	size_t			len;
241 } bfe_dma_t;
242 
243 /* Keep it power of 2 */
244 #define	TX_NUM_DESC	128
245 #define	RX_NUM_DESC	128
246 
247 
248 #define	BFE_RING_UNALLOCATED	0
249 #define	BFE_RING_ALLOCATED	1
250 
251 struct	bfe;
252 
253 typedef	struct bfe_ring {
254 	/* Lock for the ring */
255 	kmutex_t	r_lock;
256 
257 	/* Actual lock pointer. It may point to global lock */
258 	kmutex_t	*r_lockp;
259 
260 	/* DMA handle for all buffers in descriptor table */
261 	bfe_dma_t	*r_buf_dma;
262 
263 	/* DMA buffer holding descriptor table */
264 	bfe_desc_t	*r_desc;
265 
266 	/* DMA handle for the descriptor table */
267 	ddi_dma_handle_t r_desc_dma_handle;
268 	ddi_acc_handle_t r_desc_acc_handle;
269 	ddi_dma_cookie_t r_desc_cookie;
270 	uint32_t	r_ndesc;	/* number of descriptors for the ring */
271 	size_t		r_desc_len;	/* Actual descriptor size */
272 
273 	/* DMA buffer length */
274 	size_t		r_buf_len;
275 
276 	/* Flags associated to the ring */
277 	int		r_flags;
278 
279 	/* Pointer back to bfe instance */
280 	struct	bfe	*r_bfe;
281 
282 	/* Current slot number (or descriptor number) in the ring */
283 	uint_t		r_curr_desc;
284 	/* Consumed descriptor if got the interrupt (only used for TX) */
285 	uint_t		r_cons_desc;
286 
287 	uint_t		r_avail_desc;
288 } bfe_ring_t;
289 
290 /*
291  * Device driver's private data per instance.
292  */
293 typedef struct bfe {
294 	/* devinfo stuff */
295 	dev_info_t	*bfe_dip;
296 	int		bfe_unit;
297 
298 	/* PCI Configuration handle */
299 	ddi_acc_handle_t	bfe_conf_handle;
300 
301 	/* Device registers handle and regset */
302 	bfe_acc_t	bfe_mem_regset;
303 
304 	/* Ethernet addr */
305 	ether_addr_t	bfe_ether_addr;
306 	ether_addr_t	bfe_dev_addr;
307 
308 	/* MAC layer handle */
309 	mac_handle_t	bfe_machdl;
310 
311 	/* Interrupt management */
312 	ddi_intr_handle_t	bfe_intrhdl;
313 	uint_t			bfe_intrpri;
314 
315 	/* Ring Management */
316 	bfe_ring_t	bfe_tx_ring;
317 	bfe_ring_t	bfe_rx_ring;
318 	int		bfe_tx_resched;
319 
320 	/* Chip details */
321 	bfe_chip_t	bfe_chip;
322 	bfe_stats_t	bfe_stats;
323 	bfe_chip_state_t	bfe_chip_state;
324 	uint_t		bfe_chip_mode;
325 	int32_t		bfe_phy_addr;
326 	uchar_t		bfe_chip_action;
327 	bfe_hw_stats_t	bfe_hw_stats;
328 
329 	/* rw lock for chip */
330 	krwlock_t	bfe_rwlock;
331 
332 	/* Multicast table */
333 	uint32_t	bfe_mcast_cnt;
334 
335 	/* Timeout and PHY state */
336 	ddi_periodic_t	bfe_periodic_id;
337 	hrtime_t	bfe_tx_stall_time;
338 	bfe_phy_state_t	bfe_phy_state;
339 	int		bfe_phy_id;
340 
341 	/* MII register set */
342 	uint16_t	bfe_mii_exp;
343 	uint16_t	bfe_mii_bmsr;
344 	uint16_t	bfe_mii_anar;
345 	uint16_t	bfe_mii_anlpar;
346 	uint16_t	bfe_mii_bmcr;
347 
348 	/* Transceiver fields */
349 	uint8_t		bfe_adv_aneg;
350 	uint8_t		bfe_adv_100T4;
351 	uint8_t		bfe_adv_100fdx;
352 	uint8_t		bfe_adv_100hdx;
353 	uint8_t		bfe_adv_10fdx;
354 	uint8_t		bfe_adv_10hdx;
355 	uint8_t		bfe_cap_aneg;
356 	uint8_t		bfe_cap_100T4;
357 	uint8_t		bfe_cap_100fdx;
358 	uint8_t		bfe_cap_100hdx;
359 	uint8_t		bfe_cap_10fdx;
360 	uint8_t		bfe_cap_10hdx;
361 } bfe_t;
362 
363 static int bfe_identify_hardware(bfe_t *);
364 
365 #ifdef __cplusplus
366 }
367 #endif
368 #endif	/* _BFE_H */
369