1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 
22 /*
23  * Copyright 2010 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 /*
27  * Copyright (c) 2013, Joyent, Inc. All rights reserved.
28  * Copyright 2014 Nexenta Systems, Inc. All rights reserved.
29  * Copyright (c) 2014, Tegile Systems Inc. All rights reserved.
30  */
31 
32 /*
33  * Copyright (c) 2000 to 2010, LSI Corporation.
34  * All rights reserved.
35  *
36  * Redistribution and use in source and binary forms of all code within
37  * this file that is exclusively owned by LSI, with or without
38  * modification, is permitted provided that, in addition to the CDDL 1.0
39  * License requirements, the following conditions are met:
40  *
41  *    Neither the name of the author nor the names of its contributors may be
42  *    used to endorse or promote products derived from this software without
43  *    specific prior written permission.
44  *
45  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
46  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
47  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
48  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
49  * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
50  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
51  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
52  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
53  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
54  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
55  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
56  * DAMAGE.
57  */
58 
59 #ifndef _MPTSAS_IOCTL_H
60 #define	_MPTSAS_IOCTL_H
61 
62 #ifdef  __cplusplus
63 extern "C" {
64 #endif
65 
66 #include <sys/types.h>
67 
68 #define	MPTIOCTL			('I' << 8)
69 #define	MPTIOCTL_GET_ADAPTER_DATA	(MPTIOCTL | 1)
70 #define	MPTIOCTL_UPDATE_FLASH		(MPTIOCTL | 2)
71 #define	MPTIOCTL_RESET_ADAPTER		(MPTIOCTL | 3)
72 #define	MPTIOCTL_PASS_THRU		(MPTIOCTL | 4)
73 #define	MPTIOCTL_EVENT_QUERY		(MPTIOCTL | 5)
74 #define	MPTIOCTL_EVENT_ENABLE		(MPTIOCTL | 6)
75 #define	MPTIOCTL_EVENT_REPORT		(MPTIOCTL | 7)
76 #define	MPTIOCTL_GET_PCI_INFO		(MPTIOCTL | 8)
77 #define	MPTIOCTL_DIAG_ACTION		(MPTIOCTL | 9)
78 #define	MPTIOCTL_REG_ACCESS		(MPTIOCTL | 10)
79 #define	MPTIOCTL_GET_DISK_INFO		(MPTIOCTL | 11)
80 #define	MPTIOCTL_LED_CONTROL		(MPTIOCTL | 12)
81 
82 /*
83  *  The following are our ioctl() return status values.  If everything went
84  *  well, we return good status.  If the buffer length sent to us is too short
85  *  we return a status to tell the user.
86  */
87 #define	MPTIOCTL_STATUS_GOOD		0
88 #define	MPTIOCTL_STATUS_LEN_TOO_SHORT	1
89 
90 typedef struct mptsas_pci_bits
91 {
92 	union {
93 		struct {
94 			uint32_t	DeviceNumber	:5;
95 			uint32_t	FunctionNumber	:3;
96 			uint32_t	BusNumber	:24;
97 		} bits;
98 		uint32_t	AsDWORD;
99 	} u;
100 	uint32_t	PciSegmentId;
101 } mptsas_pci_bits_t;
102 /*
103  *  The following is the MPTIOCTL_GET_ADAPTER_DATA data structure.  This data
104  *  structure is setup so that we hopefully are properly aligned for both
105  *  32-bit and 64-bit mode applications.
106  *
107  *  Adapter Type - Value = 4 = SCSI Protocol through SAS-2 adapter
108  *                 Value = 6 = SCSI Protocol through SAS-3 adapter
109  *
110  *  MPI Port Number - The PCI Function number for this device
111  *
112  *  PCI Device HW Id - The PCI device number for this device
113  *
114  */
115 #define	MPTIOCTL_ADAPTER_TYPE_SAS2	4
116 #define	MPTIOCTL_ADAPTER_TYPE_SAS3	6
117 
118 typedef struct mptsas_adapter_data
119 {
120 	uint32_t		StructureLength;
121 	uint32_t		AdapterType;
122 	uint32_t		MpiPortNumber;
123 	uint32_t		PCIDeviceHwId;
124 	uint32_t		PCIDeviceHwRev;
125 	uint32_t		SubSystemId;
126 	uint32_t		SubsystemVendorId;
127 	uint32_t		Reserved1;
128 	uint32_t		MpiFirmwareVersion;
129 	uint32_t		BiosVersion;
130 	uint8_t			DriverVersion[32];
131 	uint8_t			Reserved2;
132 	uint8_t			ScsiId;
133 	uint16_t		Reserved3;
134 	mptsas_pci_bits_t	PciInformation;
135 } mptsas_adapter_data_t;
136 
137 
138 typedef struct mptsas_update_flash
139 {
140 	uint64_t	PtrBuffer;
141 	uint32_t	ImageChecksum;
142 	uint32_t	ImageOffset;
143 	uint32_t	ImageSize;
144 	uint32_t	ImageType;
145 } mptsas_update_flash_t;
146 
147 
148 #define	MPTSAS_PASS_THRU_DIRECTION_NONE		0
149 #define	MPTSAS_PASS_THRU_DIRECTION_READ		1
150 #define	MPTSAS_PASS_THRU_DIRECTION_WRITE	2
151 #define	MPTSAS_PASS_THRU_DIRECTION_BOTH		3
152 
153 typedef struct mptsas_pass_thru
154 {
155 	uint64_t	PtrRequest;
156 	uint64_t	PtrReply;
157 	uint64_t	PtrData;
158 	uint32_t	RequestSize;
159 	uint32_t	ReplySize;
160 	uint32_t	DataSize;
161 	uint32_t	DataDirection;
162 	uint64_t	PtrDataOut;
163 	uint32_t	DataOutSize;
164 	uint32_t	Timeout;
165 } mptsas_pass_thru_t;
166 
167 
168 /*
169  * Event queue defines
170  */
171 #define	MPTSAS_EVENT_QUEUE_SIZE		(50) /* Max Events stored in driver */
172 #define	MPTSAS_MAX_EVENT_DATA_LENGTH	(48) /* Size of each event in Dwords */
173 
174 typedef struct mptsas_event_query
175 {
176 	uint16_t	Entries;
177 	uint16_t	Reserved;
178 	uint32_t	Types[4];
179 } mptsas_event_query_t;
180 
181 typedef struct mptsas_event_enable
182 {
183 	uint32_t	Types[4];
184 } mptsas_event_enable_t;
185 
186 /*
187  * Event record entry for ioctl.
188  */
189 typedef struct mptsas_event_entry
190 {
191 	uint32_t	Type;
192 	uint32_t	Number;
193 	uint32_t	Data[MPTSAS_MAX_EVENT_DATA_LENGTH];
194 } mptsas_event_entry_t;
195 
196 typedef struct mptsas_event_report
197 {
198 	uint32_t		Size;
199 	mptsas_event_entry_t	Events[1];
200 } mptsas_event_report_t;
201 
202 
203 typedef struct mptsas_pci_info
204 {
205 	uint32_t	BusNumber;
206 	uint8_t		DeviceNumber;
207 	uint8_t		FunctionNumber;
208 	uint16_t	InterruptVector;
209 	uint8_t		PciHeader[256];
210 } mptsas_pci_info_t;
211 
212 
213 typedef struct mptsas_diag_action
214 {
215 	uint32_t	Action;
216 	uint32_t	Length;
217 	uint64_t	PtrDiagAction;
218 	uint32_t	ReturnCode;
219 } mptsas_diag_action_t;
220 
221 #define	MPTSAS_FW_DIAGNOSTIC_UID_NOT_FOUND	(0xFF)
222 
223 #define	MPTSAS_FW_DIAG_NEW			(0x806E6577)
224 
225 #define	MPTSAS_FW_DIAG_TYPE_REGISTER		(0x00000001)
226 #define	MPTSAS_FW_DIAG_TYPE_UNREGISTER		(0x00000002)
227 #define	MPTSAS_FW_DIAG_TYPE_QUERY		(0x00000003)
228 #define	MPTSAS_FW_DIAG_TYPE_READ_BUFFER		(0x00000004)
229 #define	MPTSAS_FW_DIAG_TYPE_RELEASE		(0x00000005)
230 
231 #define	MPTSAS_FW_DIAG_INVALID_UID		(0x00000000)
232 
233 #define	MPTSAS_FW_DIAG_ERROR_SUCCESS		(0x00000000)
234 #define	MPTSAS_FW_DIAG_ERROR_FAILURE		(0x00000001)
235 #define	MPTSAS_FW_DIAG_ERROR_INVALID_PARAMETER	(0x00000002)
236 #define	MPTSAS_FW_DIAG_ERROR_POST_FAILED	(0x00000010)
237 #define	MPTSAS_FW_DIAG_ERROR_INVALID_UID	(0x00000011)
238 #define	MPTSAS_FW_DIAG_ERROR_RELEASE_FAILED	(0x00000012)
239 #define	MPTSAS_FW_DIAG_ERROR_NO_BUFFER		(0x00000013)
240 #define	MPTSAS_FW_DIAG_ERROR_ALREADY_RELEASED	(0x00000014)
241 
242 
243 typedef struct mptsas_fw_diag_register
244 {
245 	uint8_t		ExtendedType;
246 	uint8_t		BufferType;
247 	uint16_t	ApplicationFlags;
248 	uint32_t	DiagnosticFlags;
249 	uint32_t	ProductSpecific[23];
250 	uint32_t	RequestedBufferSize;
251 	uint32_t	UniqueId;
252 } mptsas_fw_diag_register_t;
253 
254 typedef struct mptsas_fw_diag_unregister
255 {
256 	uint32_t	UniqueId;
257 } mptsas_fw_diag_unregister_t;
258 
259 #define	MPTSAS_FW_DIAG_FLAG_APP_OWNED		(0x0001)
260 #define	MPTSAS_FW_DIAG_FLAG_BUFFER_VALID	(0x0002)
261 #define	MPTSAS_FW_DIAG_FLAG_FW_BUFFER_ACCESS	(0x0004)
262 
263 typedef struct mptsas_fw_diag_query
264 {
265 	uint8_t		ExtendedType;
266 	uint8_t		BufferType;
267 	uint16_t	ApplicationFlags;
268 	uint32_t	DiagnosticFlags;
269 	uint32_t	ProductSpecific[23];
270 	uint32_t	TotalBufferSize;
271 	uint32_t	DriverAddedBufferSize;
272 	uint32_t	UniqueId;
273 } mptsas_fw_diag_query_t;
274 
275 typedef struct mptsas_fw_diag_release
276 {
277 	uint32_t	UniqueId;
278 } mptsas_fw_diag_release_t;
279 
280 #define	MPTSAS_FW_DIAG_FLAG_REREGISTER		(0x0001)
281 #define	MPTSAS_FW_DIAG_FLAG_FORCE_RELEASE	(0x0002)
282 
283 typedef struct mptsas_diag_read_buffer
284 {
285 	uint8_t		Status;
286 	uint8_t		Reserved;
287 	uint16_t	Flags;
288 	uint32_t	StartingOffset;
289 	uint32_t	BytesToRead;
290 	uint32_t	UniqueId;
291 	uint32_t	DataBuffer[1];
292 } mptsas_diag_read_buffer_t;
293 
294 /*
295  * Register Access
296  */
297 #define	REG_IO_READ	1
298 #define	REG_IO_WRITE	2
299 #define	REG_MEM_READ	3
300 #define	REG_MEM_WRITE	4
301 
302 typedef struct mptsas_reg_access
303 {
304 	uint32_t	Command;
305 	uint32_t	RegOffset;
306 	uint32_t	RegData;
307 } mptsas_reg_access_t;
308 
309 /*
310  * Disk Toplogy Information
311  */
312 typedef struct mptsas_disk_info
313 {
314 	uint64_t	SasAddress;
315 	uint16_t	Instance;
316 	uint16_t	Enclosure;
317 	uint16_t	Slot;
318 } mptsas_disk_info_t;
319 
320 typedef struct mptsas_get_disk_info
321 {
322 	uint16_t		DiskCount;
323 	mptsas_disk_info_t	*PtrDiskInfoArray;
324 	uint64_t		DiskInfoArraySize;
325 } mptsas_get_disk_info_t;
326 
327 #ifdef _KERNEL
328 
329 typedef struct mptsas_get_disk_info32
330 {
331 	uint16_t		DiskCount;
332 	caddr32_t		PtrDiskInfoArray;
333 	uint64_t		DiskInfoArraySize;
334 } mptsas_get_disk_info32_t;
335 
336 #endif /* _KERNEL */
337 
338 /*
339  * LED Control
340  */
341 
342 typedef struct mptsas_led_control
343 {
344 	uint8_t		Command;
345 	uint16_t	Enclosure;
346 	uint16_t	Slot;
347 	uint8_t		Led;
348 	uint8_t		LedStatus;
349 } mptsas_led_control_t;
350 
351 #define	MPTSAS_LEDCTL_FLAG_SET		1
352 #define	MPTSAS_LEDCTL_FLAG_GET		2
353 
354 #define	MPTSAS_LEDCTL_LED_IDENT		1
355 #define	MPTSAS_LEDCTL_LED_FAIL		2
356 #define	MPTSAS_LEDCTL_LED_OK2RM		3
357 
358 #define	MPTSAS_LEDCTL_LED_MIN		MPTSAS_LEDCTL_LED_IDENT
359 #define	MPTSAS_LEDCTL_LED_MAX		MPTSAS_LEDCTL_LED_OK2RM
360 
361 #ifdef  __cplusplus
362 }
363 #endif
364 
365 #endif	/* _MPTSAS_IOCTL_H */
366