1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 
22 /*
23  * Copyright (c) 2007, 2010, Oracle and/or its affiliates. All rights reserved.
24  * Copyright 2013 Nexenta Systems, Inc.  All rights reserved.
25  * Copyright 2019 Joyent, Inc.
26  * Copyright 2021 RackTop Systems, Inc.
27  */
28 
29 #ifndef _SATA_DEFS_H
30 #define	_SATA_DEFS_H
31 
32 #ifdef	__cplusplus
33 extern "C" {
34 #endif
35 
36 #include <sys/scsi/generic/mode.h>
37 
38 /*
39  * Common ATA commands (subset)
40  */
41 #define	SATAC_DIAG		0x90    /* diagnose command */
42 #define	SATAC_RECAL		0x10	/* restore cmd, 4 bits step rate */
43 #define	SATAC_FORMAT		0x50	/* format track command */
44 #define	SATAC_SET_FEATURES	0xef	/* set features	*/
45 #define	SATAC_IDLE_IM		0xe1	/* idle immediate */
46 #define	SATAC_STANDBY_IM	0xe0	/* standby immediate */
47 #define	SATAC_DOOR_LOCK		0xde	/* door lock */
48 #define	SATAC_DOOR_UNLOCK	0xdf	/* door unlock */
49 #define	SATAC_IDLE		0xe3	/* idle	*/
50 #define	SATAC_STANDBY		0xe2	/* standby */
51 
52 /*
53  * ATA/ATAPI disk commands (subset)
54  */
55 #define	SATAC_DSM		0x06	/* Data Set Management */
56 #define	SATAC_DEVICE_RESET	0x08    /* ATAPI device reset */
57 #define	SATAC_DOWNLOAD_MICROCODE 0x92   /* Download microcode */
58 #define	SATAC_EJECT		0xed	/* media eject */
59 #define	SATAC_FLUSH_CACHE	0xe7	/* flush write-cache */
60 #define	SATAC_ID_DEVICE		0xec    /* IDENTIFY DEVICE */
61 #define	SATAC_ID_PACKET_DEVICE	0xa1	/* ATAPI identify packet device */
62 #define	SATAC_INIT_DEVPARMS	0x91	/* initialize device parameters */
63 #define	SATAC_PACKET		0xa0	/* ATAPI packet */
64 #define	SATAC_RDMULT		0xc4	/* read multiple w/DMA */
65 #define	SATAC_RDSEC		0x20    /* read sector */
66 #define	SATAC_RDVER		0x40	/* read verify */
67 #define	SATAC_READ_DMA		0xc8	/* read DMA */
68 #define	SATAC_SEEK		0x70    /* seek */
69 #define	SATAC_SERVICE		0xa2	/* queued/overlap service */
70 #define	SATAC_SETMULT		0xc6	/* set multiple mode */
71 #define	SATAC_WRITE_DMA		0xca	/* write (multiple) w/DMA */
72 #define	SATAC_WRMULT		0xc5	/* write multiple */
73 #define	SATAC_WRSEC		0x30    /* write sector */
74 #define	SATAC_RDSEC_EXT		0x24    /* read sector extended (LBA48) */
75 #define	SATAC_READ_DMA_EXT	0x25	/* read DMA extended (LBA48) */
76 #define	SATAC_RDMULT_EXT	0x29	/* read multiple extended (LBA48) */
77 #define	SATAC_WRSEC_EXT		0x34    /* read sector extended (LBA48) */
78 #define	SATAC_WRITE_DMA_EXT	0x35	/* read DMA extended (LBA48) */
79 #define	SATAC_WRMULT_EXT	0x39	/* read multiple extended (LBA48) */
80 
81 #define	SATAC_READ_DMA_QUEUED	0xc7	/* read DMA / may be queued */
82 #define	SATAC_READ_DMA_QUEUED_EXT 0x26	/* read DMA ext / may be queued */
83 #define	SATAC_WRITE_DMA_QUEUED	0xcc	/* read DMA / may be queued */
84 #define	SATAC_WRITE_DMA_QUEUED_EXT 0x36	/* read DMA ext / may be queued */
85 #define	SATAC_READ_PM_REG	0xe4	/* read port mult reg */
86 #define	SATAC_WRITE_PM_REG	0xe8	/* write port mult reg */
87 
88 #define	SATAC_READ_FPDMA_QUEUED	0x60	/* First-Party-DMA read queued */
89 #define	SATAC_WRITE_FPDMA_QUEUED 0x61	/* First-Party-DMA write queued */
90 
91 #define	SATAC_READ_LOG_EXT	0x2f	/* read log */
92 
93 #define	SATAC_SMART		0xb0	/* SMART */
94 
95 #define	SATA_LOG_PAGE_10	0x10	/* log page 0x10 - SATA error */
96 /*
97  * Port Multiplier Commands
98  */
99 #define	SATAC_READ_PORTMULT	0xe4	/* read port multiplier */
100 #define	SATAC_WRITE_PORTMULT	0xe8	/* write port multiplier */
101 
102 /*
103  * Power Managment Commands (subset)
104  */
105 #define	SATAC_CHECK_POWER_MODE	0xe5	/* check power mode */
106 
107 #define	SATA_PWRMODE_STANDBY		0	/* standby mode */
108 #define	SATA_PWRMODE_IDLE		0x80	/* idle mode */
109 #define	SATA_PWRMODE_ACTIVE_SPINDOWN	0x40	/* PM0 and spinning down */
110 #define	SATA_PWRMODE_ACTIVE_SPINUP	0x41	/* PM0 and spinning up */
111 #define	SATA_PWRMODE_ACTIVE		0xFF	/* active or idle mode */
112 
113 
114 /*
115  * SMART FEATURES Subcommands
116  */
117 #define	SATA_SMART_READ_DATA		0xd0
118 #define	SATA_SMART_ATTR_AUTOSAVE	0xd2
119 #define	SATA_SMART_EXECUTE_OFFLINE_IMM	0xd4
120 #define	SATA_SMART_READ_LOG		0xd5
121 #define	SATA_SMART_WRITE_LOG		0xd6
122 #define	SATA_SMART_ENABLE_OPS		0xd8
123 #define	SATA_SMART_DISABLE_OPS		0xd9
124 #define	SATA_SMART_RETURN_STATUS	0xda
125 
126 /*
127  * SET FEATURES Subcommands
128  */
129 #define	SATAC_SF_ENABLE_WRITE_CACHE	0x02
130 #define	SATAC_SF_TRANSFER_MODE		0x03
131 #define	SATAC_SF_DISABLE_RMSN		0x31
132 #define	SATAC_SF_ENABLE_ACOUSTIC	0x42
133 #define	SATAC_SF_DISABLE_READ_AHEAD	0x55
134 #define	SATAC_SF_DISABLE_WRITE_CACHE	0x82
135 #define	SATAC_SF_ENABLE_READ_AHEAD	0xaa
136 #define	SATAC_SF_DISABLE_ACOUSTIC	0xc2
137 #define	SATAC_SF_ENABLE_RMSN		0x95
138 
139 /*
140  * SET FEATURES transfer mode values
141  */
142 #define	SATAC_TRANSFER_MODE_PIO_DEFAULT		0x00
143 #define	SATAC_TRANSFER_MODE_PIO_DISABLE_IODRY	0x01
144 #define	SATAC_TRANSFER_MODE_PIO_FLOW_CONTROL	0x08
145 #define	SATAC_TRANSFER_MODE_MULTI_WORD_DMA	0x20
146 #define	SATAC_TRANSFER_MODE_ULTRA_DMA		0x40
147 
148 /*
149  * Download microcode subcommands
150  */
151 #define	SATA_DOWNLOAD_MCODE_TEMP	1	/* Revert on/ reset/pwr cycle */
152 #define	SATA_DOWNLOAD_MCODE_SAVE	7	/* No offset, keep mcode */
153 
154 
155 /* Generic ATA definitions */
156 
157 #define	SATA_TAG_QUEUING_SHIFT 3
158 #define	SATA_TAG_QUEUING_MASK 0x1f
159 /*
160  * Identify Device data
161  * Although both ATA and ATAPI devices' Identify Data have the same length,
162  * some words have different meaning/content and/or are irrelevant for
163  * other type of device.
164  * Following is the ATA Device Identify data layout
165  */
166 typedef struct sata_id {
167 /*					WORD				  */
168 /*					OFFSET COMMENT			  */
169 	ushort_t  ai_config;	   /*   0  general configuration bits	  */
170 	ushort_t  ai_fixcyls;	   /*   1  # of cylinders (obsolete)	  */
171 	ushort_t  ai_resv0;	   /*   2  # reserved			  */
172 	ushort_t  ai_heads;	   /*   3  # of heads (obsolete)	  */
173 	ushort_t  ai_trksiz;	   /*   4  # of bytes/track (retired)	  */
174 	ushort_t  ai_secsiz;	   /*   5  # of bytes/sector (retired)	  */
175 	ushort_t  ai_sectors;	   /*   6  # of sectors/track (obsolete)  */
176 	ushort_t  ai_resv1[3];	   /*   7  "Vendor Unique"		  */
177 	char	ai_drvser[20];	   /*  10  Serial number		  */
178 	ushort_t ai_buftype;	   /*  20  Buffer type			  */
179 	ushort_t ai_bufsz;	   /*  21  Buffer size in 512 byte incr   */
180 	ushort_t ai_ecc;	   /*  22  # of ecc bytes avail on rd/wr  */
181 	char	ai_fw[8];	   /*  23  Firmware revision		  */
182 	char	ai_model[40];	   /*  27  Model #			  */
183 	ushort_t ai_mult1;	   /*  47  Multiple command flags	  */
184 	ushort_t ai_dwcap;	   /*  48  Doubleword capabilities	  */
185 	ushort_t ai_cap;	   /*  49  Capabilities			  */
186 	ushort_t ai_resv2;	   /*  50  Reserved			  */
187 	ushort_t ai_piomode;	   /*  51  PIO timing mode		  */
188 	ushort_t ai_dmamode;	   /*  52  DMA timing mode		  */
189 	ushort_t ai_validinfo;	   /*  53  bit0: wds 54-58, bit1: 64-70	  */
190 	ushort_t ai_curcyls;	   /*  54  # of current cylinders	  */
191 	ushort_t ai_curheads;	   /*  55  # of current heads		  */
192 	ushort_t ai_cursectrk;	   /*  56  # of current sectors/track	  */
193 	ushort_t ai_cursccp[2];	   /*  57  current sectors capacity	  */
194 	ushort_t ai_mult2;	   /*  59  multiple sectors info	  */
195 	ushort_t ai_addrsec[2];	   /*  60  LBA only: no of addr secs	  */
196 	ushort_t ai_dirdma;	   /*  62  valid in ATA/ATAPI7, DMADIR	  */
197 	ushort_t ai_dworddma;	   /*  63  multi word dma modes	  */
198 	ushort_t ai_advpiomode;	   /*  64  advanced PIO modes supported	  */
199 	ushort_t ai_minmwdma;	   /*  65  min multi-word dma cycle info  */
200 	ushort_t ai_recmwdma;	   /*  66  rec multi-word dma cycle info  */
201 	ushort_t ai_minpio;	   /*  67  min PIO cycle info		  */
202 	ushort_t ai_minpioflow;	   /*  68  min PIO cycle info w/flow ctl  */
203 	ushort_t ai_addsupported;  /*  69  additional supported		  */
204 	ushort_t ai_resv3;	   /*  70 reserved			  */
205 	ushort_t ai_typtime[2];	   /* 71-72 timing			  */
206 	ushort_t ai_resv4[2];	   /* 73-74 reserved			  */
207 	ushort_t ai_qdepth;	   /*  75  queue depth			  */
208 	ushort_t ai_satacap;	   /*  76  SATA capabilities		  */
209 	ushort_t ai_resv5;	   /*  77 reserved			  */
210 	ushort_t ai_satafsup;	   /*  78 SATA features supported	  */
211 	ushort_t ai_satafenbl;	   /*  79 SATA features enabled		  */
212 	ushort_t ai_majorversion;  /*  80  major versions supported	  */
213 	ushort_t ai_minorversion;  /*  81  minor version number supported */
214 	ushort_t ai_cmdset82;	   /*  82  command set supported	  */
215 	ushort_t ai_cmdset83;	   /*  83  more command sets supported	  */
216 	ushort_t ai_cmdset84;	   /*  84  more command sets supported	  */
217 	ushort_t ai_features85;	   /*  85 enabled features		  */
218 	ushort_t ai_features86;	   /*  86 enabled features		  */
219 	ushort_t ai_features87;	   /*  87 enabled features		  */
220 	ushort_t ai_ultradma;	   /*  88 Ultra DMA mode		  */
221 	ushort_t ai_erasetime;	   /*  89 security erase time		  */
222 	ushort_t ai_erasetimex;	   /*  90 enhanced security erase time	  */
223 	ushort_t ai_adv_pwr_mgmt;  /*  91 advanced power management time  */
224 	ushort_t ai_master_pwd;    /*  92 master password revision code   */
225 	ushort_t ai_hrdwre_reset;  /*  93 hardware reset result		  */
226 	ushort_t ai_acoustic;	   /*  94 accoustic management values	  */
227 	ushort_t ai_stream_min_sz; /*  95 stream minimum request size	  */
228 	ushort_t ai_stream_xfer_d; /*  96 streaming transfer time (DMA)   */
229 	ushort_t ai_stream_lat;    /*  97 streaming access latency	  */
230 	ushort_t ai_streamperf[2]; /* 98-99 streaming performance gran.   */
231 	ushort_t ai_addrsecxt[4];  /* 100 extended max LBA sector	  */
232 	ushort_t ai_stream_xfer_p; /* 104 streaming transfer time (PIO)   */
233 	ushort_t ai_maxcount;	   /* 105 max count of 512-byte blocks of */
234 				    /* LBA range entries		  */
235 	ushort_t ai_phys_sect_sz;  /* 106 physical sector size		  */
236 	ushort_t ai_seek_delay;	   /* 107 inter-seek delay time (usecs)	  */
237 	ushort_t ai_naa_ieee_oui;  /* 108 NAA/IEEE OUI			  */
238 	ushort_t ai_ieee_oui_uid;  /* 109 IEEE OUT/unique id		  */
239 	ushort_t ai_uid_mid;	   /* 110 unique id (mid)		  */
240 	ushort_t ai_uid_low;	   /* 111 unique id (low)		  */
241 	ushort_t ai_resv_wwn[4];   /* 112-115 reserved for WWN ext.	  */
242 	ushort_t ai_incits;	   /* 116 reserved for INCITS TR-37-2004  */
243 	ushort_t ai_words_lsec[2]; /* 117-118 words per logical sector	  */
244 	ushort_t ai_cmdset119;	   /* 119 more command sets supported	  */
245 	ushort_t ai_features120;   /* 120 enabled features		  */
246 	ushort_t ai_padding1[6];   /* pad to 126			  */
247 	ushort_t ai_rmsn;	   /* 127 removable media notification	  */
248 	ushort_t ai_securestatus;  /* 128 security status		  */
249 	ushort_t ai_vendor[31];	   /* 129-159 vendor specific		  */
250 	ushort_t ai_padding2[8];   /* 160 pad to 168			  */
251 	ushort_t ai_nomformfactor; /* 168 nominal form factor		  */
252 	ushort_t ai_dsm;	   /* 169 data set management		  */
253 	ushort_t ai_padding3[6];   /* 170 pad to 176			  */
254 	ushort_t ai_curmedser[30]; /* 176-205 current media serial #	  */
255 	ushort_t ai_sctsupport;	   /* 206 SCT command transport		  */
256 	ushort_t ai_padding4[10];  /* 207 pad to 217			  */
257 	ushort_t ai_medrotrate;	   /* 217 nominal media rotation rate	  */
258 	ushort_t ai_padding5[37];  /* 218 pad to 255			  */
259 	ushort_t ai_integrity;	   /* 255 integrity word		  */
260 } sata_id_t;
261 
262 
263 /* Identify Device: general config bits  - word 0 */
264 
265 #define	SATA_ATA_TYPE_MASK	0x8001	/* ATA Device type mask */
266 #define	SATA_ATA_TYPE		0x0000	/* ATA device */
267 #define	SATA_REM_MEDIA		0x0080	/* Removable media */
268 #define	SATA_INCOMPLETE_DATA	0x0004	/* Incomplete Identify Device data */
269 #define	SATA_CFA_TYPE		0x848a	/* CFA feature set device */
270 
271 #define	SATA_ID_SERIAL_OFFSET	10
272 #define	SATA_ID_SERIAL_LEN	20
273 #define	SATA_ID_MODEL_OFFSET	27
274 #define	SATA_ID_MODEL_LEN	40
275 #define	SATA_ID_FW_LEN		8
276 #define	SATA_ID_BDC_LEN		0x3c
277 #define	SATA_ID_ATA_INFO_LEN	0x238
278 
279 /* Identify Device: common capability bits - word 49 */
280 
281 #define	SATA_DMA_SUPPORT	0x0100
282 #define	SATA_LBA_SUPPORT	0x0200
283 #define	SATA_IORDY_DISABLE	0x0400
284 #define	SATA_IORDY_SUPPORT	0x0800
285 #define	SATA_STANDBYTIMER	0x2000
286 
287 /* Identify Device: ai_validinfo (word 53) */
288 
289 #define	SATA_VALIDINFO_88	0x0004	/* word 88 supported fields valid */
290 #define	SATA_VALIDINFO_70_64	0x0004	/* words 70-64 fields valid */
291 
292 /* Identify Device: ai_addsupported (word 69) */
293 
294 #define	SATA_DETERMINISTIC_READ	0x4000	/* word 69 deterministic read supp. */
295 #define	SATA_READ_ZERO		0x0020	/* word 69 read zero after TRIM supp. */
296 
297 /* Identify Device: ai_majorversion (word 80) */
298 
299 #define	SATA_MAJVER_7		0x0080	/* ATA/ATAPI-7 version supported */
300 #define	SATA_MAJVER_654		0x0070	/* ATA/ATAPI-6,5 or 4 ver supported */
301 #define	SATA_MAJVER_6		0x0040	/* ATA/ATAPI-6 version supported */
302 #define	SATA_MAJVER_5		0x0020	/* ATA/ATAPI-7 version supported */
303 #define	SATA_MAJVER_4		0x0010	/* ATA/ATAPI-4 version supported */
304 
305 /* Identify Device: command set supported/enabled bits - words 83 and 86 */
306 
307 #define	SATA_EXT48		0x0400	/* 48 bit address feature */
308 #define	SATA_PWRUP_IN_STANDBY	0x0020	/* Power-up in standby mode supp/en */
309 #define	SATA_RM_STATUS_NOTIFIC	0x0010	/* Removable Media Stat Notification */
310 #define	SATA_RW_DMA_QUEUED_CMD	0x0002	/* R/W DMA Queued supported */
311 #define	SATA_DWNLOAD_MCODE_CMD	0x0001	/* Download Microcode CMD supp/enbld */
312 #define	SATA_ACOUSTIC_MGMT	0x0200	/* Acoustic Management features */
313 
314 /* Identify Device: command set supported/enabled bits - words 82 and 85 */
315 
316 #define	SATA_SMART_SUPPORTED	0x0001	/* SMART feature set is supported */
317 #define	SATA_WRITE_CACHE	0x0020	/* Write Cache supported/enabled */
318 #define	SATA_LOOK_AHEAD		0x0040	/* Look Ahead supported/enabled */
319 #define	SATA_DEVICE_RESET_CMD	0x0200	/* Device Reset CMD supported/enbld */
320 #define	SATA_READ_BUFFER_CMD	0x2000	/* Read Buffer CMD supported/enbld */
321 #define	SATA_WRITE_BUFFER_CMD	0x1000	/* Write Buffer CMD supported/enbld */
322 #define	SATA_SMART_ENABLED	0x0001	/* SMART feature set is enabled */
323 
324 /* Identify Device: command set supported/enabled bits - words 84 & 87 */
325 #define	SATA_SMART_SELF_TEST_SUPPORTED	0x0002	/* SMART self-test supported */
326 /* IDLE IMMEDIATE with UNLOAD FEATURE supported */
327 #define	SATA_IDLE_UNLOAD_SUPPORTED	0x2000
328 
329 /* Identify Device: physical sector size - word 106 */
330 #define	SATA_L2PS_CHECK_BIT	0x4000	/* Set when this word valid */
331 #define	SATA_L2PS_HAS_MULT	0x2000	/* Multiple logical sectors per phys */
332 #define	SATA_L2PS_BIG_SECTORS	0x1000	/* Logical sector size > 512 */
333 #define	SATA_L2PS_EXP_MASK	0x000f	/* Logical sectors per phys exponent */
334 
335 /* Identify (Packet) Device word 63,  ATA/ATAPI-6 & 7 */
336 #define	SATA_MDMA_SEL_MASK	0x0700	/* Multiword DMA selected */
337 #define	SATA_MDMA_2_SEL		0x0400	/* Multiword DMA mode 2 selected */
338 #define	SATA_MDMA_1_SEL		0x0200	/* Multiword DMA mode 1 selected */
339 #define	SATA_MDMA_0_SEL		0x0100	/* Multiword DMA mode 0 selected */
340 #define	SATA_MDMA_2_SUP		0x0004	/* Multiword DMA mode 2 supported */
341 #define	SATA_MDMA_1_SUP		0x0002	/* Multiword DMA mode 1 supported */
342 #define	SATA_MDMA_0_SUP		0x0001	/* Multiword DMA mode 0 supported */
343 #define	SATA_MDMA_SUP_MASK	0x0007	/* Multiword DMA supported */
344 
345 /* Identify (Packet) Device Word 88 */
346 #define	SATA_UDMA_SUP_MASK		0x007f	/* UDMA modes supported */
347 #define	SATA_UDMA_SEL_MASK	0x7f00	/* UDMA modes selected */
348 
349 /* Data Set Management: word 169 */
350 #define	SATA_DSM_TRIM		0x0001	/* Set when TRIM is supported */
351 
352 /* Identify Device: command set supported/enabled bits - word 206 */
353 
354 /* All are SCT Command Transport support */
355 #define	SATA_SCT_CMD_TRANS_SUP		0x0001	/* anything */
356 #define	SATA_SCT_CMD_TRANS_LNG_SECT_SUP	0x0002	/* Long Sector Access */
357 #define	SATA_SCT_CMD_TRANS_WR_SAME_SUP	0x0004	/* Write Same */
358 #define	SATA_SCT_CMD_TRANS_ERR_RCOV_SUP	0x0008	/* Error Recovery Control */
359 #define	SATA_SCT_CMD_TRANS_FEAT_CTL_SUP	0x0010	/* Features Control */
360 #define	SATA_SCT_CMD_TRANS_DATA_TBL_SUP	0x0020	/* Data Tables supported */
361 
362 #define	SATA_DISK_SECTOR_SIZE	512	/* HD physical sector size */
363 
364 /* Identify Packet Device data definitions (ATAPI devices) */
365 
366 /* Identify Packet Device: general config bits  - word 0 */
367 
368 #define	SATA_ATAPI_TYPE_MASK	0xc000
369 #define	SATA_ATAPI_TYPE		0x8000	/* ATAPI device */
370 #define	SATA_ATAPI_ID_PKT_SZ	0x0003	/* Packet size mask */
371 #define	SATA_ATAPI_ID_PKT_12B	0x0000  /* Packet size 12 bytes */
372 #define	SATA_ATAPI_ID_PKT_16B	0x0001  /* Packet size 16 bytes */
373 #define	SATA_ATAPI_ID_DRQ_TYPE	0x0060	/* DRQ asserted in 3ms after pkt */
374 #define	SATA_ATAPI_ID_DRQ_INTR	0x0020  /* Obsolete in ATA/ATAPI 7 */
375 
376 #define	SATA_ATAPI_ID_DEV_TYPE	0x1f00	/* device type/command set mask */
377 #define	SATA_ATAPI_ID_DEV_SHFT	8
378 #define	SATA_ATAPI_DIRACC_DEV	0x0000	/* Direct Access device */
379 #define	SATA_ATAPI_SQACC_DEV	0x0100  /* Sequential access dev (tape ?) */
380 #define	SATA_ATAPI_PROC_DEV	0x0300	/* Processor device */
381 #define	SATA_ATAPI_CDROM_DEV	0x0500  /* CD_ROM device */
382 
383 /*
384  * Status bits from ATAPI Interrupt reason register (AT_COUNT) register
385  */
386 #define	SATA_ATAPI_I_COD	0x01	/* Command or Data */
387 #define	SATA_ATAPI_I_IO		0x02	/* IO direction */
388 #define	SATA_ATAPI_I_RELEASE	0x04	/* Release for ATAPI overlap */
389 
390 /* ATAPI feature reg definitions */
391 
392 #define	SATA_ATAPI_F_DATA_DIR_READ 0x04	/* DMA transfer to the host */
393 #define	SATA_ATAPI_F_OVERLAP	0x02	/* Not used by Sun drivers */
394 #define	SATA_ATAPI_F_DMA	0x01	/* Packet DMA command */
395 
396 
397 /* ATAPI IDENTIFY_DRIVE capabilities word (49) */
398 
399 #define	SATA_ATAPI_ID_CAP_DMA		0x0100 /* if zero, check word 62  */
400 #define	SATA_ATAPI_ID_CAP_OVERLAP	0x2000
401 
402 /*
403  * ATAPI Identify Packet Device word 62
404  * Word 62 is not valid for ATA/ATAPI-6
405  * Defs below are for ATA/ATAPI-7
406  */
407 #define	SATA_ATAPI_ID_DMADIR_REQ	0x8000 /* DMA direction required */
408 #define	SATA_ATAPI_ID_DMA_SUP		0x0400 /* DMA is supported */
409 
410 /*
411  * ATAPI signature bits
412  */
413 #define	SATA_ATAPI_SIG_HI	0xeb	/* in high cylinder register */
414 #define	SATA_ATAPI_SIG_LO	0x14	/* in low cylinder register */
415 
416 /* These values are pre-set for CD_ROM/DVD ? */
417 
418 #define	SATA_ATAPI_SECTOR_SIZE		2048
419 #define	SATA_ATAPI_MAX_BYTES_PER_DRQ	0xf800 /* 16 bits - 2KB  ie 62KB */
420 #define	SATA_ATAPI_HEADS		64
421 #define	SATA_ATAPI_SECTORS_PER_TRK	32
422 
423 /* SATA Capabilites bits (word 76) */
424 
425 #define	SATA_NCQ		0x100
426 #define	SATA_3_SPEED		0x008
427 #define	SATA_2_SPEED		0x004
428 #define	SATA_1_SPEED		0x002
429 
430 /* SATA Features Supported (word 78) - not used */
431 
432 /* SATA Features Enabled (word 79) - not used */
433 
434 #define	SATA_READ_AHEAD_SUPPORTED(x)	((x).ai_cmdset82 & SATA_LOOK_AHEAD)
435 #define	SATA_READ_AHEAD_ENABLED(x)	((x).ai_features85 & SATA_LOOK_AHEAD)
436 #define	SATA_WRITE_CACHE_SUPPORTED(x)	((x).ai_cmdset82 & SATA_WRITE_CACHE)
437 #define	SATA_WRITE_CACHE_ENABLED(x)	((x).ai_features85 & SATA_WRITE_CACHE)
438 #define	SATA_RM_NOTIFIC_SUPPORTED(x)	\
439 	((x).ai_cmdset83 & SATA_RM_STATUS_NOTIFIC)
440 #define	SATA_RM_NOTIFIC_ENABLED(x)	\
441 	((x).ai_features86 & SATA_RM_STATUS_NOTIFIC)
442 
443 /*
444  * Generic NCQ related defines
445  */
446 
447 #define	NQ			0x80	/* Not a queued cmd - tag not valid */
448 #define	NCQ_TAG_MASK		0x1f	/* NCQ command tag mask */
449 #define	FIS_TYPE_REG_H2D	0x27	/* Reg FIS - Host to Device */
450 #define	FIS_CMD_UPDATE		0x80
451 /*
452  * Status bits from AT_STATUS register
453  */
454 #define	SATA_STATUS_BSY		0x80    /* controller busy */
455 #define	SATA_STATUS_DRDY	0x40    /* drive ready	*/
456 #define	SATA_STATUS_DF		0x20    /* device fault	*/
457 #define	SATA_STATUS_DSC		0x10    /* seek operation complete */
458 #define	SATA_STATUS_DRQ		0x08	/* data request */
459 #define	SATA_STATUS_CORR	0x04    /* obsolete */
460 #define	SATA_STATUS_IDX		0x02    /* obsolete */
461 #define	SATA_STATUS_ERR		0x01    /* error flag */
462 
463 /*
464  * Status bits from AT_ERROR register
465  */
466 #define	SATA_ERROR_ICRC		0x80	/* CRC data transfer error detected */
467 #define	SATA_ERROR_UNC		0x40	/* uncorrectable data error */
468 #define	SATA_ERROR_MC		0x20    /* Media change	*/
469 #define	SATA_ERROR_IDNF		0x10    /* ID/Address not found	*/
470 #define	SATA_ERROR_MCR		0x08	/* media change request	*/
471 #define	SATA_ERROR_ABORT	0x04    /* aborted command */
472 #define	SATA_ERROR_NM		0x02	/* no media */
473 #define	SATA_ERROR_EOM		0x02    /* end of media (Packet cmds) */
474 #define	SATA_ERROR_ILI		0x01    /* cmd sepcific */
475 
476 
477 /*
478  * Bits from the device control register
479  */
480 #define	SATA_DEVCTL_NIEN	0x02	/* not interrupt enabled */
481 #define	SATA_DEVCTL_SRST	0x04	/* software reset */
482 #define	SATA_DEVCTL_HOB		0x80	/* high order bit */
483 
484 /* device_reg */
485 #define	SATA_ADH_LBA		0x40	/* addressing in LBA mode not chs */
486 
487 /* ATAPI transport version-in Inquiry data */
488 #define	SATA_ATAPI_TRANS_VERSION(inq) \
489 	(*((uint8_t *)(inq) + 3) >> 4)
490 
491 #define	SCSI_LOG_PAGE_HDR_LEN	4	/* # bytes of a SCSI log page header */
492 #define	SCSI_LOG_PARAM_HDR_LEN	4	/* # byttes of a SCSI log param hdr */
493 
494 /* Number of log entries per extended selftest log block */
495 #define	ENTRIES_PER_EXT_SELFTEST_LOG_BLK	19
496 
497 /* Number of entries per SCSI LOG SENSE SELFTEST RESULTS page */
498 #define	SCSI_ENTRIES_IN_LOG_SENSE_SELFTEST_RESULTS	20
499 
500 /* Length of a SCSI LOG SENSE SELFTEST RESULTS parameter */
501 #define	SCSI_LOG_SENSE_SELFTEST_PARAM_LEN	0x10
502 
503 #define	DIAGNOSTIC_FAILURE_ON_COMPONENT	0x40
504 
505 #define	SCSI_COMPONENT_81	0x81
506 #define	SCSI_COMPONENT_82	0x82
507 #define	SCSI_COMPONENT_83	0x83
508 #define	SCSI_COMPONENT_84	0x84
509 #define	SCSI_COMPONENT_85	0x85
510 #define	SCSI_COMPONENT_86	0x86
511 #define	SCSI_COMPONENT_87	0x87
512 #define	SCSI_COMPONENT_88	0x88
513 
514 #define	SCSI_ASC_ATA_DEV_FEAT_NOT_ENABLED	0x67
515 #define	SCSI_ASCQ_ATA_DEV_FEAT_NOT_ENABLED	0x0b
516 
517 #define	SCSI_PREDICTED_FAILURE	0x5d
518 #define	SCSI_GENERAL_HD_FAILURE	0x10
519 
520 #define	SCSI_INFO_EXCEPTIONS_PARAM_LEN	4
521 
522 #define	READ_LOG_EXT_LOG_DIRECTORY	0
523 #define	READ_LOG_EXT_NCQ_ERROR_RECOVERY	0x10
524 #define	SMART_SELFTEST_LOG_PAGE		6
525 #define	EXT_SMART_SELFTEST_LOG_PAGE	7
526 
527 /*
528  * SATA NCQ error recovery page (0x10)
529  */
530 struct sata_ncq_error_recovery_page {
531 	uint8_t	ncq_tag;
532 	uint8_t reserved1;
533 	uint8_t ncq_status;
534 	uint8_t ncq_error;
535 	uint8_t ncq_sector_number;
536 	uint8_t ncq_cyl_low;
537 	uint8_t ncq_cyl_high;
538 	uint8_t ncq_dev_head;
539 	uint8_t ncq_sector_number_ext;
540 	uint8_t ncq_cyl_low_ext;
541 	uint8_t ncq_cyl_high_ext;
542 	uint8_t reserved2;
543 	uint8_t ncq_sector_count;
544 	uint8_t ncq_sector_count_ext;
545 	uint8_t reserved3[242];
546 	uint8_t ncq_vendor_unique[255];
547 	uint8_t ncq_checksum;
548 };
549 
550 /* SMART attribute of Start/Stop Count */
551 #define	SMART_START_STOP_COUNT_ID	0x4
552 
553 /*
554  * SMART data structures
555  */
556 struct smart_data {
557 	uint8_t smart_vendor_specific[362];
558 	uint8_t smart_offline_data_collection_status;
559 	uint8_t smart_selftest_exec_status;
560 	uint8_t smart_secs_to_complete_offline_data[2];
561 	uint8_t smart_vendor_specific2;
562 	uint8_t smart_offline_data_collection_capability;
563 	uint8_t smart_capability[2];
564 	uint8_t	smart_error_logging_capability;
565 	uint8_t smart_vendor_specific3;
566 	uint8_t smart_short_selftest_polling_time;
567 	uint8_t smart_extended_selftest_polling_time;
568 	uint8_t smart_conveyance_selftest_polling_time;
569 	uint8_t smart_reserved[11];
570 	uint8_t smart_vendor_specific4[125];
571 	uint8_t smart_checksum;
572 };
573 
574 struct smart_selftest_log_entry {
575 	uint8_t	smart_selftest_log_lba_low;
576 	uint8_t	smart_selftest_log_status;
577 	uint8_t	smart_selftest_log_timestamp[2];
578 	uint8_t smart_selftest_log_checkpoint;
579 	uint8_t smart_selftest_log_failing_lba[4];	/* from LSB to MSB */
580 	uint8_t smart_selftest_log_vendor_specific[15];
581 };
582 
583 #define	NUM_SMART_SELFTEST_LOG_ENTRIES	21
584 struct smart_selftest_log {
585 	uint8_t	smart_selftest_log_revision[2];
586 	struct	smart_selftest_log_entry
587 	    smart_selftest_log_entries[NUM_SMART_SELFTEST_LOG_ENTRIES];
588 	uint8_t	smart_selftest_log_vendor_specific[2];
589 	uint8_t smart_selftest_log_index;
590 	uint8_t smart_selftest_log_reserved[2];
591 	uint8_t smart_selftest_log_checksum;
592 };
593 
594 struct smart_ext_selftest_log_entry {
595 	uint8_t	smart_ext_selftest_log_lba_low;
596 	uint8_t smart_ext_selftest_log_status;
597 	uint8_t smart_ext_selftest_log_timestamp[2];
598 	uint8_t smart_ext_selftest_log_checkpoint;
599 	uint8_t smart_ext_selftest_log_failing_lba[6];
600 	uint8_t smart_ext_selftest_log_vendor_specific[15];
601 };
602 
603 struct smart_ext_selftest_log {
604 	uint8_t	smart_ext_selftest_log_rev;
605 	uint8_t	smart_ext_selftest_log_reserved;
606 	uint8_t	smart_ext_selftest_log_index[2];
607 	struct smart_ext_selftest_log_entry smart_ext_selftest_log_entries[19];
608 	uint8_t	smart_ext_selftest_log_vendor_specific[2];
609 	uint8_t	smart_ext_selftest_log_reserved2[11];
610 	uint8_t	smart_ext_selftest_log_checksum;
611 };
612 
613 struct read_log_ext_directory {
614 	uint8_t	read_log_ext_vers[2];	/* general purpose log version */
615 	uint8_t read_log_ext_nblks[255][2]; /* # of blks @ log addr index+1 */
616 };
617 
618 /*
619  * The definition of CONTROL byte field in SCSI command
620  * according to SAM 5
621  */
622 #define	CTL_BYTE_VENDOR_MASK		0xc0
623 #define	CTL_BYTE_NACA_MASK		0x04
624 
625 /*
626  * The definition of mask in START STOP UNIT command
627  */
628 #define	START_STOP_IMMED_MASK		0x01
629 #define	START_STOP_POWER_COND_MASK	0xF0
630 #define	START_STOP_START_MASK		0x01
631 #define	START_STOP_LOEJ_MASK		0x02
632 #define	START_STOP_NOFLUSH_MASK		0x04
633 #define	START_STOP_MODIFIER_MASK	0x0f
634 #define	START_STOP_POWER_COND_SHIFT	4
635 
636 /*
637  * SMART specific data
638  * These eventually need to go to a generic scsi header file
639  * for now they will reside here
640  */
641 #define	PC_CUMULATIVE_VALUES			0x01
642 #define	PAGE_CODE_GET_SUPPORTED_LOG_PAGES	0x00
643 #define	PAGE_CODE_SELF_TEST_RESULTS		0x10
644 #define	PAGE_CODE_INFORMATION_EXCEPTIONS	0x2f
645 #define	PAGE_CODE_SMART_READ_DATA		0x30
646 #define	PAGE_CODE_START_STOP_CYCLE_COUNTER	0x0e
647 
648 
649 struct log_parameter {
650 	uint8_t param_code[2];		/* parameter dependant */
651 	uint8_t param_ctrl_flags;	/* see defines below */
652 	uint8_t param_len;		/* # of bytes following */
653 	uint8_t param_values[1];	/* # of bytes defined by param_len */
654 };
655 
656 /* param_ctrl_flag fields */
657 #define	LOG_CTRL_LP	0x01	/* list parameter */
658 #define	LOG_CTRL_LBIN	0x02	/* list is binary */
659 #define	LOG_CTRL_TMC	0x0c	/* threshold met criteria */
660 #define	LOG_CTRL_ETC	0x10	/* enable threshold comparison */
661 #define	LOG_CTRL_TSD	0x20	/* target save disable */
662 #define	LOG_CTRL_DS	0x40	/* disable save */
663 #define	LOG_CTRL_DU	0x80	/* disable update */
664 
665 #define	SMART_MAGIC_VAL_1	0x4f
666 #define	SMART_MAGIC_VAL_2	0xc2
667 #define	SMART_MAGIC_VAL_3	0xf4
668 #define	SMART_MAGIC_VAL_4	0x2c
669 
670 #define	SCT_STATUS_LOG_PAGE	0xe0
671 
672 /*
673  * Acoustic management
674  */
675 
676 struct mode_acoustic_management {
677 	struct mode_page	mode_page;	/* common mode page header */
678 	uchar_t	acoustic_manag_enable;	/* Set to 1 enable, Set 0 disable */
679 	uchar_t	acoustic_manag_level;	/* Acoustic management level	  */
680 	uchar_t	vendor_recommended_value; /* Vendor recommended value	  */
681 };
682 
683 #define	PAGELENGTH_DAD_MODE_ACOUSTIC_MANAGEMENT 3 /* Acoustic manag pg len */
684 #define	P_CNTRL_CURRENT		0
685 #define	P_CNTRL_CHANGEABLE	1
686 #define	P_CNTRL_DEFAULT		2
687 #define	P_CNTRL_SAVED		3
688 
689 #define	ACOUSTIC_DISABLED	0
690 #define	ACOUSTIC_ENABLED	1
691 
692 #define	MODEPAGE_ACOUSTIC_MANAG 0x30
693 
694 /*
695  * Port Multiplier registers' offsets
696  */
697 #define	SATA_PMULT_GSCR0		0x0
698 #define	SATA_PMULT_GSCR1		0x1
699 #define	SATA_PMULT_GSCR2		0x2
700 #define	SATA_PMULT_GSCR32		0x20
701 #define	SATA_PMULT_GSCR33		0x21
702 #define	SATA_PMULT_GSCR64		0x40
703 #define	SATA_PMULT_GSCR96		0x60
704 
705 #define	SATA_PMULT_PORTNUM_MASK		0xf
706 
707 #define	SATA_PMULT_PSCR0		0x0
708 #define	SATA_PMULT_PSCR1		0x1
709 #define	SATA_PMULT_PSCR2		0x2
710 #define	SATA_PMULT_PSCR3		0x3
711 #define	SATA_PMULT_PSCR4		0x4
712 
713 #define	SATA_PMULT_REG_SSTS		(SATA_PMULT_PSCR0)
714 #define	SATA_PMULT_REG_SERR		(SATA_PMULT_PSCR1)
715 #define	SATA_PMULT_REG_SCTL		(SATA_PMULT_PSCR2)
716 #define	SATA_PMULT_REG_SACT		(SATA_PMULT_PSCR3)
717 #define	SATA_PMULT_REG_SNTF		(SATA_PMULT_PSCR4)
718 
719 /*
720  * Port Multiplier capabilities
721  * (Indicated by GSCR64, and enabled by GSCR96)
722  */
723 #define	SATA_PMULT_CAP_BIST		(1 << 0)
724 #define	SATA_PMULT_CAP_PMREQ		(1 << 1)
725 #define	SATA_PMULT_CAP_SSC		(1 << 2)
726 #define	SATA_PMULT_CAP_SNOTIF		(1 << 3)
727 #define	SATA_PMULT_CAP_PHYEVENT		(1 << 4)
728 
729 /*
730  * sstatus field definitions
731  */
732 #define	SSTATUS_DET_SHIFT	0
733 #define	SSTATUS_SPD_SHIFT	4
734 #define	SSTATUS_IPM_SHIFT	8
735 
736 #define	SSTATUS_DET	(0xf << SSTATUS_DET_SHIFT)
737 #define	SSTATUS_SPD	(0xf << SSTATUS_SPD_SHIFT)
738 #define	SSTATUS_IPM	(0xf << SSTATUS_IPM_SHIFT)
739 
740 /*
741  * sstatus DET values
742  */
743 #define	SSTATUS_DET_NODEV		0	/* No dev detected */
744 #define	SSTATUS_DET_DEVPRE_NOPHYCOM	1	/* dev detected */
745 #define	SSTATUS_DET_DEVPRE_PHYCOM	3	/* dev detected */
746 #define	SSTATUS_DET_PHYOFFLINE		4	/* PHY is in offline */
747 
748 #define	SSTATUS_GET_DET(x) \
749 	(x & SSTATUS_DET)
750 
751 #define	SSTATUS_SET_DET(x, new_val) \
752 	(x = (x & ~SSTATUS_DET) | (new_val & SSTATUS_DET))
753 
754 #define	SSTATUS_SPD_NODEV	0 /* No device present */
755 #define	SSTATUS_SPD_GEN1	1 /* Gen 1 rate negotiated */
756 #define	SSTATUS_SPD_GEN2	2 /* Gen 2 rate negotiated */
757 #define	SSTATUS_SPD_GEN3	3 /* Gen 3 rate negotiated */
758 
759 /*
760  * sstatus IPM values
761  */
762 #define	SSTATUS_IPM_NODEV_NOPHYCOM	0x0 /* No dev, no PHY */
763 #define	SSTATUS_IPM_ACTIVE		0x1 /* Interface active */
764 #define	SSTATUS_IPM_POWERPARTIAL	0x2 /* partial power mgmnt */
765 #define	SSTATUS_IPM_POWERSLUMBER	0x6 /* slumber power mgmt */
766 
767 #define	SSTATUS_GET_IPM(x) \
768 	((x & SSTATUS_IPM) >> SSTATUS_IPM_SHIFT)
769 
770 #define	SSTATUS_SET_IPM(x, new_val) \
771 	(x = (x & ~SSTATUS_IPM) | \
772 	((new_val << SSTATUS_IPM_SHIFT) & SSTATUS_IPM))
773 
774 
775 /*
776  * serror register fields
777  */
778 #define	SERROR_DATA_ERR_FIXED	(1 << 0) /* D integrity err */
779 #define	SERROR_COMM_ERR_FIXED	(1 << 1) /* comm err recov */
780 #define	SERROR_DATA_ERR		(1 << 8) /* D integrity err */
781 #define	SERROR_PERSISTENT_ERR	(1 << 9)  /* norecov com err */
782 #define	SERROR_PROTOCOL_ERR	(1 << 10) /* protocol err */
783 #define	SERROR_INT_ERR		(1 << 11) /* internal err */
784 #define	SERROR_PHY_RDY_CHG	(1 << 16) /* PHY state change */
785 #define	SERROR_PHY_INT_ERR	(1 << 17) /* PHY internal err */
786 #define	SERROR_COMM_WAKE	(1 << 18) /* COM wake */
787 #define	SERROR_10B_TO_8B_ERR	(1 << 19) /* 10B-to-8B decode */
788 #define	SERROR_DISPARITY_ERR	(1 << 20) /* disparity err */
789 #define	SERROR_CRC_ERR		(1 << 21) /* CRC err */
790 #define	SERROR_HANDSHAKE_ERR	(1 << 22) /* Handshake err */
791 #define	SERROR_LINK_SEQ_ERR	(1 << 23) /* Link seq err */
792 #define	SERROR_TRANS_ERR	(1 << 24) /* Tran state err */
793 #define	SERROR_FIS_TYPE		(1 << 25) /* FIS type err */
794 #define	SERROR_EXCHANGED_ERR	(1 << 26) /* Device exchanged */
795 
796 /*
797  * S-Control Bridge port x register fields
798  */
799 #define	SCONTROL_DET_SHIFT	0
800 #define	SCONTROL_SPD_SHIFT	4
801 #define	SCONTROL_IPM_SHIFT	8
802 #define	SCONTROL_SPM_SHIFT	12
803 
804 #define	SCONTROL_DET		(0xf << SCONTROL_DET_SHIFT)
805 #define	SCONTROL_SPD		(0xf << SCONTROL_SPD_SHIFT)
806 #define	SCONTROL_IPM		(0xf << SCONTROL_IPM_SHIFT)
807 #define	SCONTROL_SPM		(0xf << SCONTROL_SPM_SHIFT)
808 
809 #define	SCONTROL_GET_DET(x)	\
810 	(x & SCONTROL_DET)
811 
812 #define	SCONTROL_SET_DET(x, new_val)    \
813 	(x = (x & ~SCONTROL_DET) | (new_val & SCONTROL_DET))
814 
815 #define	SCONTROL_DET_NOACTION	0 /* Do nothing to port */
816 #define	SCONTROL_DET_COMRESET	1 /* Re-initialize port */
817 #define	SCONTROL_DET_DISABLE	4 /* Disable port */
818 
819 #define	SCONTROL_SPD_NOLIMIT	0 /* No speed limit */
820 #define	SCONTROL_SPD_GEN1	1 /* Limit Gen 1 rate */
821 #define	SCONTROL_SPD_GEN2	2 /* Limit Gen 2 rate */
822 #define	SCONTROL_SPD_GEN3	3 /* Limit Gen 3 rate */
823 
824 #define	SCONTROL_GET_IPM(x)	\
825 	((x & SCONTROL_IPM) >> SCONTROL_IPM_SHIFT)
826 
827 #define	SCONTROL_SET_IPM(x, new_val)	\
828 	(x = (x & ~SCONTROL_IPM) | \
829 	((new_val << SCONTROL_IPM_SHIFT) & SCONTROL_IPM))
830 
831 /* NB: IPM disable value is a bit-field (though not described) */
832 #define	SCONTROL_IPM_NORESTRICT		0 /* No PM limit */
833 #define	SCONTROL_IPM_DISABLE_PARTIAL	1 /* Disable partial */
834 #define	SCONTROL_IPM_DISABLE_SLUMBER	2 /* Disable slumber */
835 #define	SCONTROL_IPM_DISABLE_BOTH	3 /* Disable both */
836 #define	SCONTROL_IPM_DISABLE_DEVSLEEP	4 /* Disable devsleep */
837 #define	SCONTROL_IPM_DISABLE_ALL	7 /* Disable all PM */
838 
839 #define	SCONTROL_SPM_NORESTRICT		0 /* No PM limits */
840 #define	SCONTROL_SPM_DO_PARTIAL		1 /* Go to partial */
841 #define	SCONTROL_SPM_DO_SLUMBER		2 /* Go to slumber */
842 #define	SCONTROL_SPM_DO_ACTIVE		4 /* Go to active */
843 
844 #ifdef	__cplusplus
845 }
846 #endif
847 
848 #endif /* _SATA_DEFS_H */
849