Searched defs:False (Results 1 - 25 of 27) sorted by relevance

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/freebsd-head/contrib/bmake/unit-tests/
H A Dvarmisc.mk12 False= ${echo false >&2:L:sh}FALSE macro
19 @echo ${VSET:U${False}}
23 @echo ${UNDEF:D${False}}
35 @echo ${1:L:?${True}:${False}}
39 @echo ${0:L:?${True}:${False}}
43 @echo ${VSET:U${1:L:?${True}:${False}}}
/freebsd-head/contrib/llvm/include/llvm/Analysis/
H A DLazyValueInfo.h63 Unknown = -1, False = 0, True = 1 enumerator in enum:llvm::LazyValueInfo::Tristate
/freebsd-head/sbin/adjkerntz/
H A Dadjkerntz.c64 #define False (0) macro
92 int need_restore = False, sleep_mode = False, looping,
106 init = False;
149 looping = False;
153 init = False;
350 need_restore = False;
362 sleep_mode = False;
/freebsd-head/contrib/libarchive/libarchive/
H A Darchive_ppmd_private.h56 #define False 0 macro
/freebsd-head/contrib/llvm/tools/lldb/include/lldb/Utility/
H A DJSON.h31 enum class Kind { String, Number, True, False, Null, Object, Array }; member in class:lldb_private::JSONValue::Kind
162 return V->GetKind() == JSONValue::Kind::False;
263 False, enumerator in enum:lldb_private::JSONParser::Token
/freebsd-head/contrib/llvm/lib/Transforms/Coroutines/
H A DCoroElide.cpp119 auto *False = ConstantInt::getFalse(C); local
121 CA->replaceAllUsesWith(False);
H A DCoroSplit.cpp344 auto *False = ConstantInt::getFalse(Context); local
347 CE->replaceAllUsesWith(False);
/freebsd-head/contrib/llvm/tools/clang/lib/AST/
H A DExprClassification.cpp569 const Expr *False) {
576 if (True->getType()->isVoidType() || False->getType()->isVoidType()) {
581 bool FalseIsThrow = isa<CXXThrowExpr>(False->IgnoreParenImpCasts());
582 if (const Expr *NonThrow = TrueIsThrow ? (FalseIsThrow ? nullptr : False)
596 RCl = ClassifyInternal(Ctx, False);
568 ClassifyConditional(ASTContext &Ctx, const Expr *True, const Expr *False) argument
/freebsd-head/contrib/bzip2/
H A Dbzip2recover.c57 #define False ((Bool)0) macro
264 if (n <= 4) return False;
H A Dbzip2.c170 #define False ((Bool)0) macro
323 return False;
535 return False;
617 return False;
623 return False;
629 return False;
988 if (MY_S_ISREG(statBuf.st_mode)) return False;
1089 return False;
1096 return False;
1114 if (ns < nx) return False;
[all...]
H A Dbzlib_private.h50 #define False ((Bool)0) macro
/freebsd-head/contrib/one-true-awk/
H A Drun.c82 Cell *False = &falsecell; variable
586 return(False);
629 return(False);
648 else return(False);
650 if ( !i ) return(False);
655 else return(False);
657 if (i) return(False);
683 else return(False);
685 else return(False);
687 else return(False);
[all...]
/freebsd-head/contrib/llvm/include/llvm/CodeGen/
H A DSelectionDAG.h989 SDValue False, ISD::CondCode Cond) {
991 False, getCondCode(Cond));
988 getSelectCC(const SDLoc &DL, SDValue LHS, SDValue RHS, SDValue True, SDValue False, ISD::CondCode Cond) argument
/freebsd-head/contrib/llvm/lib/Target/Hexagon/
H A DHexagonISelLoweringHVX.cpp1012 SDValue False = getZero(dl, ResTy, DAG); local
1013 return DAG.getSelect(dl, ResTy, VecV, True, False);
/freebsd-head/contrib/llvm/lib/Target/AMDGPU/
H A DAMDGPURegisterBankInfo.cpp1252 auto False = B.buildConstant(SelType, 0); local
1255 MRI.setRegBank(False.getReg(0), *DstBank);
1259 B.buildSelect(DefRegs[0], SrcReg, True, False);
1262 auto Sel = B.buildSelect(SelType, SrcReg, True, False);
1266 B.buildSelect(DstReg, SrcReg, True, False);
H A DR600ISelLowering.cpp946 SDValue False = Op.getOperand(3); local
952 SDValue MinMax = combineFMinMaxLegacy(DL, VT, LHS, RHS, True, False, CC, DCI);
971 // Move hardware True/False values to the correct operand.
975 if (isHWTrueValue(False) && isHWFalseValue(True)) {
977 std::swap(False, True);
982 std::swap(False, True);
989 if (isHWTrueValue(True) && isHWFalseValue(False) &&
992 return DAG.getNode(ISD::SELECT_CC, DL, VT, LHS, RHS, True, False, CC);
1018 std::swap(True, False);
1029 // Bitcast True / False t
1987 SDValue False = N->getOperand(3); local
[all...]
H A DAMDGPUISelLowering.cpp1317 SDValue True, SDValue False,
1320 if (!(LHS == True && RHS == False) && !(LHS == False && RHS == True))
3657 SDValue False = N->getOperand(2); local
3662 !DAG.isConstantValueOfAnyType(False)) {
3672 return DAG.getNode(ISD::SELECT, SL, VT, NewCond, False, True);
3677 = combineFMinMaxLegacy(SDLoc(N), VT, LHS, RHS, True, False, CC, DCI);
3685 return performCtlz_CttzCombine(SDLoc(N), Cond, True, False, DCI);
1315 combineFMinMaxLegacy(const SDLoc &DL, EVT VT, SDValue LHS, SDValue RHS, SDValue True, SDValue False, SDValue CC, DAGCombinerInfo &DCI) const argument
H A DSIISelLowering.cpp5384 SDValue False = DAG.getTargetConstant(0, DL, MVT::i1); local
5394 Unorm = UnormConst->getZExtValue() ? True : False;
5477 ST->hasFeature(AMDGPU::FeatureR128A16) ? True : False);
5481 Ops.push_back(DimInfo->DA ? True : False);
5483 Ops.push_back(IsD16 ? True : False);
/freebsd-head/contrib/llvm/lib/Transforms/InstCombine/
H A DInstCombineCasts.cpp208 Value *False = EvaluateInDifferentType(I->getOperand(2), Ty, isSigned); local
209 Res = SelectInst::Create(I->getOperand(0), True, False);
/freebsd-head/contrib/llvm/include/llvm/IR/
H A DIRBuilder.h890 BranchInst *CreateCondBr(Value *Cond, BasicBlock *True, BasicBlock *False, argument
893 return Insert(addBranchMetadata(BranchInst::Create(True, False, Cond),
899 BranchInst *CreateCondBr(Value *Cond, BasicBlock *True, BasicBlock *False, argument
901 BranchInst *Br = BranchInst::Create(True, False, Cond);
2241 Value *CreateSelect(Value *C, Value *True, Value *False, argument
2245 if (auto *FC = dyn_cast<Constant>(False))
2248 SelectInst *Sel = SelectInst::Create(C, True, False);
/freebsd-head/contrib/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp669 SDValue False, const SDLoc &DL) {
675 True.getValueType(), True, FCC0, False, Cond);
690 SDValue False = N->getOperand(2);
691 EVT FalseTy = False.getValueType();
696 ConstantSDNode *FalseC = dyn_cast<ConstantSDNode>(False);
698 // If the RHS (False) is 0, we swap the order of the operands
717 return DAG.getNode(ISD::SELECT, DL, FalseTy, SetCC, False, True);
740 return DAG.getNode(ISD::ADD, DL, SetCC.getValueType(), SetCC, False);
769 // Since RHS (False) is 0, we swap the order of the True/False operand
668 createCMovFP(SelectionDAG &DAG, SDValue Cond, SDValue True, SDValue False, const SDLoc &DL) argument
1950 SDValue False = DAG.getConstant(0, DL, MVT::i32); local
[all...]
/freebsd-head/contrib/llvm/lib/Transforms/Vectorize/
H A DSLPVectorizer.cpp3692 Value *False = vectorizeTree(E->getOperand(2)); variable
3699 Value *V = Builder.CreateSelect(Cond, True, False);
4903 // IsKnownPositive is set to False.
/freebsd-head/contrib/llvm/tools/clang/include/clang/Parse/
H A DParser.h2298 True, False, Ambiguous, Error member in class:clang::TPResult
2314 /// declaration specifier, TPResult::False if it is not,
2321 isCXXDeclarationSpecifier(TPResult BracedCastResult = TPResult::False,
2341 // Returning TPResult::True/False indicates that the ambiguity was
/freebsd-head/contrib/llvm/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp557 // If Dest BasicBlock is False-BasicBlock (FBB), swap branch probabilities,
5468 False = cast<ConstantSDNode>(FalseRes)->getZExtValue(); local
5469 if (!isInt<16>(True) || !isInt<16>(False))
/freebsd-head/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp4979 // False = 0x8000000000000000 + fp_to_sint(Src - 0x8000000000000000)
4980 // Result = select (Src < 0x8000000000000000), True, False
4984 SDValue False = DAG.getNode(ISD::FP_TO_SINT, dl, DstVT, local
4986 False = DAG.getNode(ISD::XOR, dl, DstVT, False,
4988 Result = DAG.getSelect(dl, DstVT, Sel, True, False);

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