/* * Copyright 2014-2017 Cavium, Inc. * The contents of this file are subject to the terms of the Common Development * and Distribution License, v.1, (the "License"). * * You may not use this file except in compliance with the License. * * You can obtain a copy of the License at available * at http://opensource.org/licenses/CDDL-1.0 * * See the License for the specific language governing permissions and * limitations under the License. */ #ifndef _l5_defs_h_ #define _l5_defs_h_ #include "5706_reg.h" #include "l2_defs.h" #include "l2_ftq.h" /* data structure defs: */ typedef struct ddp_tagged_msg_header { u16_t mpa_length; u16_t control; u32_t stag; u64_t to; } ddp_tagged_msg_header_t; typedef struct ddp_untagged_msg_header { u16_t mpa_length; u16_t control; union { u32_t reserved; u32_t invalidated_stag; } rdmap_rsvd; u32_t queue_number; u32_t msn; u32_t mo; } ddp_untagged_msg_header_t; typedef struct rdmap_read_request_header { ddp_untagged_msg_header_t ddp_header; u32_t sink_stag; u64_t sink_to; u32_t length; u32_t source_stag; u64_t source_to; } rdmap_read_request_header_t; /**************************************************************************** * L5 Window Reference Count Table Entry ****************************************************************************/ typedef struct l5_window_ref_cnt_table_entry { u8_t wrcte_pidx; /* Incremented by CP whenever a SQ work request or incoming RDMA Read Request is processed that references the associated window for source data. */ u8_t wrcte_cidx; /* Incremented by COM whenever an entry is removed from the command queue where the associated window is the data source. */ } l5_window_ref_cnt_table_entry_t; /* constants and macros: */ #define RDMA_WRITE_CMD 0 #define RDMA_READ_REQ_CMD 1 #define RDMA_READ_RSP_CMD 2 #define RDMA_SEND_CMD 3 #define RDMA_SEND_W_EVENT 4 #define RDMA_MPA_HDR_LENGTH 2 #define RDMA_MPA_CRC_LENGTH 4 #define RDMA_MPA_MARKER_SIZE 4 #define RDMA_DDP_TAGGED_HDR_LENGTH 14 #define RDMA_DDP_UNTAGGED_HDR_LENGTH 18 #define RDMA_READ_REQ_MSG_LENGTH 28 #define RDMA_WRITE_HDR_LENGTH (RDMA_MPA_HDR_LENGTH + RDMA_DDP_TAGGED_HDR_LENGTH) #define RDMA_SEND_MSG_HDR_LENGTH (RDMA_MPA_HDR_LENGTH + RDMA_DDP_UNTAGGED_HDR_LENGTH) #define RDMA_READ_REQ_HDR_LENGTH (RDMA_MPA_HDR_LENGTH + RDMA_DDP_UNTAGGED_HDR_LENGTH + RDMA_READ_REQ_MSG_LENGTH) #define RDMA_READ_RESP_HDR_LENGTH (RDMA_MPA_HDR_LENGTH + RDMA_DDP_TAGGED_HDR_LENGTH) #define RDMA_STANDARD_L5_OVERHEAD (RDMA_STANDARD_HDR_LENGTH + RDMA_MPA_HDR_LENGTH + RDMA_MPA_CRC_LENGTH) #define RDMA_READ_REQ_L5_OVERHEAD (RDMA_READ_REQ_HDR_LENGTH + RDMA_MPA_HDR_LENGTH + RDMA_MPA_CRC_LENGTH) #define RDMA_SEND_QUEUE_NUMBER 0x00000000 #define RDMA_READ_QUEUE_NUMBER 0x00000001 #define RDMA_TERM_QUEUE_NUMBER 0x00000002 #define RDMA_MPA_MARKER_INTERVAL 512 /* MPA marker interval */ #define RDMA_DATA_MARKER_INTERVAL (RDMA_MPA_MARKER_INTERVAL - RDMA_MPA_MARKER_SIZE) /* Data between markers */ #define RDMA_MPA_MARKER_INTERVAL_SHIFT 9 #define DDP_CTRL_RDMA_WRITE 0x8000 #define DDP_CTRL_RDMA_READ_REQ 0x0001 #define DDP_CTRL_RDMA_READ_RSP 0x8002 #define DDP_CTRL_SEND_MSG 0x0003 #define DDP_CTRL_SEND_INV_MSG 0x0004 #define DDP_CTRL_SEND_EVT_MSG 0x0005 #define DDP_CTRL_SEND_INV_EVT_MSG 0x0006 #define DDP_CTRL_L_BIT 0x4000 #define DDP_CTRL_T_BIT 0x8000 #define DDP_CTRL_DDP_VERSION_MASK 0x0300 #define DDP_CTRL_DDP_VERSION 0x0000 #define DDP_TAGGED_HDR_LENGTH 14 #define DDP_UNTAGGED_HDR_LENGTH 18 #define DDP_QN_SEND_MESSAGE_QUEUE 0x00000000 #define DDP_QN_RDMA_READ_REQUEST_QUEUE 0x00000001 #define DDP_QN_RDMA_TERMINATE_QUEUE 0x00000002 #define DDP_MAX_UNTAGGED_QUEUES 0x00000003 #define RDMAP_CTRL_RDMAP_VERSION_MASK 0x00C0 #define RDMAP_CTRL_RDMAP_VERSION 0x0000 #define RDMAP_CTRL_RDMAP_OPCODE_MASK 0x0F #define RDMAP_CTRL_RDMA_WRITE 0x00 #define RDMAP_CTRL_RDMA_READ_REQ 0x01 #define RDMAP_CTRL_RDMA_READ_RSP 0x02 #define RDMAP_CTRL_SEND_MSG 0x03 #define RDMAP_CTRL_SEND_W_INV_MSG 0x04 #define RDMAP_CTRL_SEND_W_EVT_MSG 0x05 #define RDMAP_CTRL_SEND_W_INV_EVT_MSG 0x06 #define L5_MEMORY_REGION_STAG_BIT 0x00800000 #define L5_STAG_INDEX_MASK 0x00FFFFFF #define L5_STAG_KEY_MASK 0xFF000000 #define L5_MIN_HOST_PAGE_SIZE 0x100 /* 256 bytes */ #define L5_WINDOW_CACHE_KEY_BASE 0x2000 /* define context memory-related constants for things like STag validation: */ #define L5_RX_VCID_SIZE 128 /* L5 RxP protocol errors: */ #define RX_PROTO_ERR_MPA_LEN_NON_MULT_FOUR 0x00000001 #define RX_PROTO_ERR_INVALID_MPA_LEN 0x00000002 #define RX_PROTO_ERR_INVALID_MARKER 0x00000003 #define RX_PROTO_ERR_INVALID_TAGGED_OPCODE 0x00000004 #define RX_PROTO_ERR_INVALID_UNTAGGED_OPCODE 0x00000005 #define RX_PROTO_ERR_STAG_INVALID 0x00000006 #define RX_PROTO_ERR_STAG_BASE_BOUNDS 0x00000007 #define RX_PROTO_ERR_STAG_ACCESS_RIGHTS 0x00000008 #define RX_PROTO_ERR_STAG_PROTECTION 0x00000009 #define RX_PROTO_ERR_STAG_TO_WRAP 0x0000000A #define RX_PROTO_ERR_INVALID_DDP_VERSION 0x0000000B #define RX_PROTO_ERR_INVALID_RDMAP_VERSION 0x0000000C #define RX_PROTO_ERR_INVALID_DDP_QUEUE_NUMBER 0x0000000D #define RX_PROTO_ERR_IRD_EXCEEDED 0x0000000E #define RX_PROTO_ERR_MSN_GAP 0x0000000F #define RX_PROTO_ERR_MSN_RANGE 0x00000010 #define RX_PROTO_ERR_NO_RCV_BUFF_AVAIL 0x00000011 #define RX_PROTO_ERR_RCV_BASE_BOUNDS 0x00000012 #define RX_PROTO_ERR_RCV_MO_WRAP 0x00000013 #define RX_PROTO_ERR_INVALID_MPA_CRC 0x00000014 #define RX_PROTO_ERR_NO_RCV_BUFF_POSTED 0x00000080 #define RX_PROTO_ERR_TERM_MSG_RECEIVED 0x000000FF /* L5 */ #define L5_TCP_MAX_DACK 2 /* Iscsi */ //#define THIN_CONN_ESTAB #define RDMA_CONFIG_CRC_OFFSET_SHIFT 18 #define VCID_SIZE 128 #define VCID_SHIFT 7 #define CID_ENC(_idx) ((_idx)<