Lines Matching refs:tmp2
87 #define SET_SECCTX(cnum, is_shctx, tmp1, tmp2, label) \ argument
90 sethi %hi(FLUSH_ADDR), tmp2 ;\
93 flush tmp2 ;\
110 flush tmp2 ;\
281 #define TTE_SET_REF_ML(tte, ttepa, tsbarea, tmp1, tmp2, label) \ argument
300 or %g0, 1, tmp2; \
301 sllx tmp2, MMU_PAGESHIFT, tmp2; \
302 xor tmp1, tmp2, tmp1; \
330 #define TTE_SET_REFMOD_ML(tte, ttepa, tsbarea, tmp1, tmp2, label, \ argument
353 or %g0, 1, tmp2; \
354 sllx tmp2, MMU_PAGESHIFT, tmp2; \
355 xor tmp1, tmp2, tmp1; \
387 #define MAKE_TSBREG(tsbreg, tsbinfo, vabase, tmp1, tmp2, label) \ argument
393 lduh [tsbinfo + TSBINFO_SZCODE], tmp2; \
395 or vabase, tmp2, tmp2; \
397 or tsbreg, tmp2, tsbreg; \
412 #define MAKE_TSBREG_SECTSB(tsbreg, tsb1, tsb2, tmp1, tmp2, tmp3, label) \ argument
421 ldx [tsb2 + TSBINFO_VADDR], tmp2 ;\
423 and tmp2, tmp3, tmp2 ;\
424 sllx tmp2, TSBREG_SECTSB_MKSHIFT, tmp2 ;\
425 or tmp1, tmp2, tmp3 ;\
428 lduh [tsb2 + TSBINFO_SZCODE], tmp2 ;\
430 and tmp2, TSB_SOFTSZ_MASK, tmp2 ;\
431 sllx tmp2, TSBREG_SECSZ_SHIFT, tmp2 ;\
432 or tmp1, tmp2, tmp3 ;\
573 #define GET_2ND_TSBE_PTR(tagacc, tsbp8k, tsbe_ptr, tmp1, tmp2, label) \ argument
574 GET_2ND_TSB_BASE(tsbp8k, tsbe_ptr, tmp2, label); \
578 GET_TSBE_POINTER(MMU_PAGESHIFT4M, tsbe_ptr, tagacc, tmp1, tmp2)
600 #define GET_1ST_TSBE_PTR(tagacc, tsbe_ptr, tmp1, tmp2)
614 #define LOAD_TSBREG(tsbreg, tmp1, tmp2) \ argument
616 sethi %hi(FLUSH_ADDR), tmp2; \
619 flush tmp2
717 #define SET_SHCTX_TAGACC(tmp1, tmp2, asi) \ argument
719 mov MMU_TAG_ACCESS, tmp2 ;\
720 ldxa [tmp2]asi, tmp2 /* tmp2 = VA|CTX */ ;\
721 srlx tmp2, TAGACC_SHIFT, tmp2 ;\
722 sllx tmp2, TAGACC_SHIFT, tmp2 /* tmp2 = VA */ ;\
727 or tmp1, tmp2, tmp1 /* tmp1 = VA|SHCTX */ ;\
728 mov MMU_TAG_ACCESS, tmp2 ;\
729 stxa tmp1, [tmp2]asi /* asi = VA|SHCTX */
783 #define SAVE_CTX1(traptype, tmp1, tmp2, label) \ argument
788 SET_SHCTX_TAGACC(tmp1, tmp2, ASI_DMMU) ;\
792 SET_SHCTX_TAGACC(tmp1, tmp2, ASI_IMMU) ;\