Lines Matching refs:imr_p
150 volatile uint64_t *imr_p = ib_intr_map_reg_addr(ib_p, ino); in ib_intr_enable() local
161 *imr_p = ib_get_map_reg(mondo, cpu_id); in ib_intr_enable()
174 volatile uint64_t *imr_p = ib_intr_map_reg_addr(ib_p, ino); in ib_intr_disable() local
180 IB_INO_INTR_OFF(imr_p); in ib_intr_disable()
181 *imr_p; /* flush previous write */ in ib_intr_disable()
215 ib_intr_dist_nintr(ib_t *ib_p, ib_ino_t ino, volatile uint64_t *imr_p) in ib_intr_dist_nintr() argument
217 volatile uint64_t imr = *imr_p; in ib_intr_dist_nintr()
225 if (ib_map_reg_get_cpu(*imr_p) == cpu_id) in ib_intr_dist_nintr()
228 *imr_p = ib_get_map_reg(IB_IMR2MONDO(imr), cpu_id); in ib_intr_dist_nintr()
229 imr = *imr_p; /* flush previous write */ in ib_intr_dist_nintr()
266 volatile uint64_t imr, *imr_p, *state_reg; in ib_intr_dist() local
270 imr_p = ib_intr_map_reg_addr(ib_p, ino); in ib_intr_dist()
273 if (ib_map_reg_get_cpu(*imr_p) == cpu_id) /* same cpu, no reprog */ in ib_intr_dist()
277 IB_INO_INTR_OFF(imr_p); in ib_intr_dist()
278 imr = *imr_p; /* flush previous write */ in ib_intr_dist()
288 imr_p, IB_INO_TO_MONDO(ib_p, ino)); in ib_intr_dist()
292 *imr_p = ib_get_map_reg(IB_IMR2MONDO(imr), cpu_id); in ib_intr_dist()
293 imr = *imr_p; /* flush previous write */ in ib_intr_dist()