Lines Matching refs:rdip
465 px_get_my_childs_dip(dev_info_t *dip, dev_info_t *rdip) in px_get_my_childs_dip() argument
467 dev_info_t *cdip = rdip; in px_get_my_childs_dip()
477 px_intx_ops(dev_info_t *dip, dev_info_t *rdip, ddi_intr_op_t intr_op, in px_intx_ops() argument
484 "handle=%p\n", dip, rdip, intr_op, hdlp); in px_intx_ops()
488 ret = pci_intx_get_cap(rdip, (int *)result); in px_intx_ops()
501 hdlp->ih_pri : pci_class_to_pil(rdip); in px_intx_ops()
506 ret = px_add_intx_intr(dip, rdip, hdlp); in px_intx_ops()
509 ret = px_rem_intx_intr(dip, rdip, hdlp); in px_intx_ops()
519 ret = px_ib_update_intr_state(px_p, rdip, hdlp->ih_inum, in px_intx_ops()
523 ret = px_ib_update_intr_state(px_p, rdip, hdlp->ih_inum, in px_intx_ops()
527 ret = pci_intx_set_mask(rdip); in px_intx_ops()
530 ret = pci_intx_clr_mask(rdip); in px_intx_ops()
533 ret = pci_intx_get_pending(rdip, (int *)result); in px_intx_ops()
537 *(int *)result = i_ddi_get_intx_nintrs(rdip); in px_intx_ops()
549 px_msix_ops(dev_info_t *dip, dev_info_t *rdip, ddi_intr_op_t intr_op, in px_msix_ops() argument
563 "handle=%p\n", dip, rdip, intr_op, hdlp); in px_msix_ops()
582 ret = pci_msi_get_cap(rdip, hdlp->ih_type, (int *)result); in px_msix_ops()
593 if ((ret = px_msi_alloc(px_p, rdip, hdlp->ih_type, in px_msix_ops()
599 "count 0x%x\n", rdip, hdlp->ih_type, hdlp->ih_inum, in px_msix_ops()
606 (i_ddi_get_msix(rdip) == NULL)) { in px_msix_ops()
609 if (msix_p = pci_msix_init(rdip)) { in px_msix_ops()
610 i_ddi_set_msix(rdip, msix_p); in px_msix_ops()
615 "failed, rdip 0x%p inum 0x%x\n", rdip, in px_msix_ops()
618 (void) px_msi_free(px_p, rdip, hdlp->ih_inum, in px_msix_ops()
626 (void) pci_msi_unconfigure(rdip, hdlp->ih_type, hdlp->ih_inum); in px_msix_ops()
635 (i_ddi_get_msix(rdip))) { in px_msix_ops()
636 pci_msix_fini(i_ddi_get_msix(rdip)); in px_msix_ops()
637 i_ddi_set_msix(rdip, NULL); in px_msix_ops()
640 (void) px_msi_free(px_p, rdip, hdlp->ih_inum, in px_msix_ops()
645 hdlp->ih_pri : pci_class_to_pil(rdip); in px_msix_ops()
650 if ((ret = px_add_msiq_intr(dip, rdip, hdlp, in px_msix_ops()
653 "failed, rdip 0x%p msi 0x%x\n", rdip, msi_num); in px_msix_ops()
661 (void) px_rem_msiq_intr(dip, rdip, in px_msix_ops()
668 (void) px_rem_msiq_intr(dip, rdip, in px_msix_ops()
677 ret = px_ib_update_intr_state(px_p, rdip, hdlp->ih_inum, in px_msix_ops()
694 if ((ret = px_ib_update_intr_state(px_p, rdip, in px_msix_ops()
708 ret = px_rem_msiq_intr(dip, rdip, in px_msix_ops()
731 if ((pci_is_msi_enabled(rdip, hdlp->ih_type) != DDI_SUCCESS) || in px_msix_ops()
735 if ((ret = pci_msi_configure(rdip, hdlp->ih_type, in px_msix_ops()
741 if (i_ddi_intr_get_current_nenables(rdip) < 1) { in px_msix_ops()
742 if ((ret = pci_msi_enable_mode(rdip, in px_msix_ops()
748 if ((ret = pci_msi_clr_mask(rdip, hdlp->ih_type, in px_msix_ops()
754 if ((ret = pci_msi_set_mask(rdip, hdlp->ih_type, in px_msix_ops()
763 if (i_ddi_intr_get_current_nenables(rdip) > 1) in px_msix_ops()
766 if ((ret = pci_msi_disable_mode(rdip, hdlp->ih_type)) in px_msix_ops()
774 if ((ret = pci_msi_configure(rdip, hdlp->ih_type, in px_msix_ops()
779 ret = pci_msi_enable_mode(rdip, hdlp->ih_type); in px_msix_ops()
782 ret = pci_msi_disable_mode(rdip, hdlp->ih_type); in px_msix_ops()
785 ret = pci_msi_set_mask(rdip, hdlp->ih_type, hdlp->ih_inum); in px_msix_ops()
788 ret = pci_msi_clr_mask(rdip, hdlp->ih_type, hdlp->ih_inum); in px_msix_ops()
791 ret = pci_msi_get_pending(rdip, hdlp->ih_type, in px_msix_ops()
795 ret = pci_msi_get_nintrs(rdip, hdlp->ih_type, (int *)result); in px_msix_ops()
799 ret = pci_msi_get_nintrs(rdip, hdlp->ih_type, (int *)result); in px_msix_ops()
941 px_add_intx_intr(dev_info_t *dip, dev_info_t *rdip, in px_add_intx_intr() argument
957 "handler=%x arg1=%x arg2=%x\n", ddi_driver_name(rdip), in px_add_intx_intr()
958 ddi_get_instance(rdip), ino, hdlp->ih_cb_func, in px_add_intx_intr()
961 ih_p = px_ib_alloc_ih(rdip, hdlp->ih_inum, in px_add_intx_intr()
970 hdlp->ih_pri = pci_class_to_pil(rdip); in px_add_intx_intr()
974 if (px_ib_intr_locate_ih(ipil_p, rdip, hdlp->ih_inum, 0, 0)) { in px_add_intx_intr()
1061 weight = pci_class_to_intr_weight(rdip); in px_add_intx_intr()
1062 intr_dist_cpuid_add_device_weight(ino_p->ino_cpuid, rdip, weight); in px_add_intx_intr()
1096 px_rem_intx_intr(dev_info_t *dip, dev_info_t *rdip, in px_rem_intx_intr() argument
1111 ddi_driver_name(rdip), ddi_get_instance(rdip), ino); in px_rem_intx_intr()
1117 ih_p = px_ib_intr_locate_ih(ipil_p, rdip, hdlp->ih_inum, 0, 0); in px_rem_intx_intr()
1127 intr_dist_cpuid_rem_device_weight(ino_p->ino_cpuid, rdip); in px_rem_intx_intr()
1154 px_add_msiq_intr(dev_info_t *dip, dev_info_t *rdip, in px_add_msiq_intr() argument
1169 "arg1=0x%x arg2=0x%x cpu=0x%x\n", ddi_driver_name(rdip), in px_add_msiq_intr()
1170 ddi_get_instance(rdip), hdlp->ih_cb_func, hdlp->ih_cb_arg1, in px_add_msiq_intr()
1173 ih_p = px_ib_alloc_ih(rdip, hdlp->ih_inum, hdlp->ih_cb_func, in px_add_msiq_intr()
1194 hdlp->ih_pri = pci_class_to_pil(rdip); in px_add_msiq_intr()
1198 if (px_ib_intr_locate_ih(ipil_p, rdip, in px_add_msiq_intr()
1264 weight = pci_class_to_intr_weight(rdip); in px_add_msiq_intr()
1265 intr_dist_cpuid_add_device_weight(ino_p->ino_cpuid, rdip, weight); in px_add_msiq_intr()
1300 px_rem_msiq_intr(dev_info_t *dip, dev_info_t *rdip, in px_rem_msiq_intr() argument
1314 ddi_driver_name(rdip), ddi_get_instance(rdip), msiq_id, ino); in px_rem_msiq_intr()
1320 ih_p = px_ib_intr_locate_ih(ipil_p, rdip, hdlp->ih_inum, rec_type, in px_rem_msiq_intr()
1331 intr_dist_cpuid_rem_device_weight(ino_p->ino_cpuid, rdip); in px_rem_msiq_intr()