Lines Matching refs:hdlp
478 ddi_intr_handle_impl_t *hdlp, void *result) in px_intx_ops() argument
484 "handle=%p\n", dip, rdip, intr_op, hdlp); in px_intx_ops()
495 *(int *)result = hdlp->ih_scratch1; in px_intx_ops()
500 *(int *)result = hdlp->ih_pri ? in px_intx_ops()
501 hdlp->ih_pri : pci_class_to_pil(rdip); in px_intx_ops()
506 ret = px_add_intx_intr(dip, rdip, hdlp); in px_intx_ops()
509 ret = px_rem_intx_intr(dip, rdip, hdlp); in px_intx_ops()
512 ret = px_ib_get_intr_target(px_p, hdlp->ih_vector, in px_intx_ops()
519 ret = px_ib_update_intr_state(px_p, rdip, hdlp->ih_inum, in px_intx_ops()
520 hdlp->ih_vector, hdlp->ih_pri, PX_INTR_STATE_ENABLE, 0, 0); in px_intx_ops()
523 ret = px_ib_update_intr_state(px_p, rdip, hdlp->ih_inum, in px_intx_ops()
524 hdlp->ih_vector, hdlp->ih_pri, PX_INTR_STATE_DISABLE, 0, 0); in px_intx_ops()
550 ddi_intr_handle_impl_t *hdlp, void *result) in px_msix_ops() argument
563 "handle=%p\n", dip, rdip, intr_op, hdlp); in px_msix_ops()
566 if ((hdlp->ih_cap & DDI_INTR_FLAG_MSI64) && msi_state_p->msi_addr64) { in px_msix_ops()
576 (void) px_msi_get_msinum(px_p, hdlp->ih_dip, in px_msix_ops()
577 (hdlp->ih_flags & DDI_INTR_MSIX_DUP) ? hdlp->ih_main->ih_inum : in px_msix_ops()
578 hdlp->ih_inum, &msi_num); in px_msix_ops()
582 ret = pci_msi_get_cap(rdip, hdlp->ih_type, (int *)result); in px_msix_ops()
593 if ((ret = px_msi_alloc(px_p, rdip, hdlp->ih_type, in px_msix_ops()
594 hdlp->ih_inum, hdlp->ih_scratch1, in px_msix_ops()
595 (uintptr_t)hdlp->ih_scratch2, in px_msix_ops()
599 "count 0x%x\n", rdip, hdlp->ih_type, hdlp->ih_inum, in px_msix_ops()
600 hdlp->ih_scratch1); in px_msix_ops()
605 if ((hdlp->ih_type == DDI_INTR_TYPE_MSIX) && in px_msix_ops()
616 hdlp->ih_inum); in px_msix_ops()
618 (void) px_msi_free(px_p, rdip, hdlp->ih_inum, in px_msix_ops()
619 hdlp->ih_scratch1); in px_msix_ops()
626 (void) pci_msi_unconfigure(rdip, hdlp->ih_type, hdlp->ih_inum); in px_msix_ops()
628 if (hdlp->ih_type == DDI_INTR_TYPE_MSI) in px_msix_ops()
631 if (hdlp->ih_flags & DDI_INTR_MSIX_DUP) in px_msix_ops()
634 if (((i_ddi_intr_get_current_nintrs(hdlp->ih_dip) - 1) == 0) && in px_msix_ops()
640 (void) px_msi_free(px_p, rdip, hdlp->ih_inum, in px_msix_ops()
641 hdlp->ih_scratch1); in px_msix_ops()
644 *(int *)result = hdlp->ih_pri ? in px_msix_ops()
645 hdlp->ih_pri : pci_class_to_pil(rdip); in px_msix_ops()
650 if ((ret = px_add_msiq_intr(dip, rdip, hdlp, in px_msix_ops()
662 hdlp, msiq_rec_type, msi_num, msiq_id); in px_msix_ops()
669 hdlp, msiq_rec_type, msi_num, msiq_id); in px_msix_ops()
677 ret = px_ib_update_intr_state(px_p, rdip, hdlp->ih_inum, in px_msix_ops()
678 px_msiqid_to_devino(px_p, msiq_id), hdlp->ih_pri, in px_msix_ops()
684 "new_vector: %x\n", hdlp->ih_inum, hdlp->ih_scratch1); in px_msix_ops()
686 ret = pci_msix_dup(hdlp->ih_dip, hdlp->ih_inum, in px_msix_ops()
687 hdlp->ih_scratch1); in px_msix_ops()
695 hdlp->ih_inum, px_msiqid_to_devino(px_p, msiq_id), in px_msix_ops()
696 hdlp->ih_pri, PX_INTR_STATE_DISABLE, msiq_rec_type, in px_msix_ops()
709 hdlp, msiq_rec_type, msi_num, msiq_id); in px_msix_ops()
721 ret = px_ib_set_msix_target(px_p, hdlp, msi_num, in px_msix_ops()
731 if ((pci_is_msi_enabled(rdip, hdlp->ih_type) != DDI_SUCCESS) || in px_msix_ops()
732 (hdlp->ih_type == DDI_INTR_TYPE_MSIX)) { in px_msix_ops()
733 nintrs = i_ddi_intr_get_current_nintrs(hdlp->ih_dip); in px_msix_ops()
735 if ((ret = pci_msi_configure(rdip, hdlp->ih_type, in px_msix_ops()
736 nintrs, hdlp->ih_inum, msi_addr, in px_msix_ops()
737 hdlp->ih_type == DDI_INTR_TYPE_MSIX ? in px_msix_ops()
743 hdlp->ih_type)) != DDI_SUCCESS) in px_msix_ops()
748 if ((ret = pci_msi_clr_mask(rdip, hdlp->ih_type, in px_msix_ops()
749 hdlp->ih_inum)) != DDI_SUCCESS) in px_msix_ops()
754 if ((ret = pci_msi_set_mask(rdip, hdlp->ih_type, in px_msix_ops()
755 hdlp->ih_inum)) != DDI_SUCCESS) in px_msix_ops()
766 if ((ret = pci_msi_disable_mode(rdip, hdlp->ih_type)) in px_msix_ops()
772 nintrs = i_ddi_intr_get_current_nintrs(hdlp->ih_dip); in px_msix_ops()
774 if ((ret = pci_msi_configure(rdip, hdlp->ih_type, in px_msix_ops()
775 nintrs, hdlp->ih_inum, msi_addr, in px_msix_ops()
779 ret = pci_msi_enable_mode(rdip, hdlp->ih_type); in px_msix_ops()
782 ret = pci_msi_disable_mode(rdip, hdlp->ih_type); in px_msix_ops()
785 ret = pci_msi_set_mask(rdip, hdlp->ih_type, hdlp->ih_inum); in px_msix_ops()
788 ret = pci_msi_clr_mask(rdip, hdlp->ih_type, hdlp->ih_inum); in px_msix_ops()
791 ret = pci_msi_get_pending(rdip, hdlp->ih_type, in px_msix_ops()
792 hdlp->ih_inum, (int *)result); in px_msix_ops()
795 ret = pci_msi_get_nintrs(rdip, hdlp->ih_type, (int *)result); in px_msix_ops()
799 ret = pci_msi_get_nintrs(rdip, hdlp->ih_type, (int *)result); in px_msix_ops()
942 ddi_intr_handle_impl_t *hdlp) in px_add_intx_intr() argument
954 ino = hdlp->ih_vector; in px_add_intx_intr()
958 ddi_get_instance(rdip), ino, hdlp->ih_cb_func, in px_add_intx_intr()
959 hdlp->ih_cb_arg1, hdlp->ih_cb_arg2); in px_add_intx_intr()
961 ih_p = px_ib_alloc_ih(rdip, hdlp->ih_inum, in px_add_intx_intr()
962 hdlp->ih_cb_func, hdlp->ih_cb_arg1, hdlp->ih_cb_arg2, 0, 0); in px_add_intx_intr()
969 if (hdlp->ih_pri == 0) in px_add_intx_intr()
970 hdlp->ih_pri = pci_class_to_pil(rdip); in px_add_intx_intr()
973 if (ino_p && (ipil_p = px_ib_ino_locate_ipil(ino_p, hdlp->ih_pri))) { in px_add_intx_intr()
974 if (px_ib_intr_locate_ih(ipil_p, rdip, hdlp->ih_inum, 0, 0)) { in px_add_intx_intr()
976 "dup intr #%d\n", hdlp->ih_inum); in px_add_intx_intr()
983 hdlp->ih_vector = ino_p->ino_sysino; in px_add_intx_intr()
1018 ipil_p = px_ib_new_ino_pil(ib_p, ino, hdlp->ih_pri, ih_p); in px_add_intx_intr()
1022 hdlp->ih_vector = ino_p->ino_sysino; in px_add_intx_intr()
1025 hdlp->ih_pri, hdlp->ih_vector); in px_add_intx_intr()
1027 DDI_INTR_ASSIGN_HDLR_N_ARGS(hdlp, in px_add_intx_intr()
1030 ret = i_ddi_add_ivintr(hdlp); in px_add_intx_intr()
1036 DDI_INTR_ASSIGN_HDLR_N_ARGS(hdlp, ih_p->ih_handler, in px_add_intx_intr()
1043 ipil_p->ipil_pil = hdlp->ih_pri; in px_add_intx_intr()
1058 hdlp->ih_target = ino_p->ino_cpuid; in px_add_intx_intr()
1071 ino_p->ino_sysino, hdlp->ih_pri); in px_add_intx_intr()
1084 "pil=%x\n", ino_p->ino_sysino, hdlp->ih_pri); in px_add_intx_intr()
1097 ddi_intr_handle_impl_t *hdlp) in px_rem_intx_intr() argument
1108 ino = hdlp->ih_vector; in px_rem_intx_intr()
1116 ipil_p = px_ib_ino_locate_ipil(ino_p, hdlp->ih_pri); in px_rem_intx_intr()
1117 ih_p = px_ib_intr_locate_ih(ipil_p, rdip, hdlp->ih_inum, 0, 0); in px_rem_intx_intr()
1130 hdlp->ih_vector = ino_p->ino_sysino; in px_rem_intx_intr()
1131 i_ddi_rem_ivintr(hdlp); in px_rem_intx_intr()
1155 ddi_intr_handle_impl_t *hdlp, msiq_rec_type_t rec_type, in px_add_msiq_intr() argument
1170 ddi_get_instance(rdip), hdlp->ih_cb_func, hdlp->ih_cb_arg1, in px_add_msiq_intr()
1171 hdlp->ih_cb_arg2, cpu_id); in px_add_msiq_intr()
1173 ih_p = px_ib_alloc_ih(rdip, hdlp->ih_inum, hdlp->ih_cb_func, in px_add_msiq_intr()
1174 hdlp->ih_cb_arg1, hdlp->ih_cb_arg2, rec_type, msg_code); in px_add_msiq_intr()
1193 if (hdlp->ih_pri == 0) in px_add_msiq_intr()
1194 hdlp->ih_pri = pci_class_to_pil(rdip); in px_add_msiq_intr()
1197 if (ino_p && (ipil_p = px_ib_ino_locate_ipil(ino_p, hdlp->ih_pri))) { in px_add_msiq_intr()
1199 hdlp->ih_inum, rec_type, msg_code)) { in px_add_msiq_intr()
1201 "dup intr #%d\n", hdlp->ih_inum); in px_add_msiq_intr()
1208 hdlp->ih_vector = ino_p->ino_sysino; in px_add_msiq_intr()
1217 ipil_p = px_ib_new_ino_pil(ib_p, ino, hdlp->ih_pri, ih_p); in px_add_msiq_intr()
1224 hdlp->ih_vector = ino_p->ino_sysino; in px_add_msiq_intr()
1227 hdlp->ih_pri, hdlp->ih_vector); in px_add_msiq_intr()
1229 DDI_INTR_ASSIGN_HDLR_N_ARGS(hdlp, in px_add_msiq_intr()
1232 ret = i_ddi_add_ivintr(hdlp); in px_add_msiq_intr()
1238 DDI_INTR_ASSIGN_HDLR_N_ARGS(hdlp, ih_p->ih_handler, in px_add_msiq_intr()
1245 ipil_p->ipil_pil = hdlp->ih_pri; in px_add_msiq_intr()
1261 hdlp->ih_target = ino_p->ino_cpuid; in px_add_msiq_intr()
1274 ino_p->ino_sysino, hdlp->ih_pri); in px_add_msiq_intr()
1289 ino_p->ino_sysino, hdlp->ih_pri); in px_add_msiq_intr()
1301 ddi_intr_handle_impl_t *hdlp, msiq_rec_type_t rec_type, in px_rem_msiq_intr() argument
1319 ipil_p = px_ib_ino_locate_ipil(ino_p, hdlp->ih_pri); in px_rem_msiq_intr()
1320 ih_p = px_ib_intr_locate_ih(ipil_p, rdip, hdlp->ih_inum, rec_type, in px_rem_msiq_intr()
1334 hdlp->ih_vector = ino_p->ino_sysino; in px_rem_msiq_intr()
1335 i_ddi_rem_ivintr(hdlp); in px_rem_msiq_intr()