Lines Matching refs:fp

55 #include <sys/fp.h>
550 struct fpu_ctx *fp; /* parent fpu context */
557 fp = &t->t_lwp->lwp_pcb.pcb_fpu;
564 fp_save(fp);
578 fx = fp->fpu_regs.kfpu_u.kfpu_fx;
586 cfp->fpu_xsave_mask = fp->fpu_xsave_mask;
588 VERIFY(fp->fpu_regs.kfpu_u.kfpu_xs != NULL);
590 fx = &fp->fpu_regs.kfpu_u.kfpu_xs->xs_fxsave;
618 * fp context belongs to a thread on deathrow
623 * fp context belongs to the current thread
628 * disable fpu and release the fp context for the CPU
633 fp_free(struct fpu_ctx *fp, int isexec)
637 if (fp->fpu_flags & FPU_VALID)
645 fp->fpu_flags |= FPU_VALID;
647 if (curthread->t_lwp && fp == &curthread->t_lwp->lwp_pcb.pcb_fpu) {
661 fp_save(struct fpu_ctx *fp)
666 if (!fp || fp->fpu_flags & FPU_VALID) {
670 ASSERT(curthread->t_lwp && fp == &curthread->t_lwp->lwp_pcb.pcb_fpu);
674 fpxsave(fp->fpu_regs.kfpu_u.kfpu_fx);
678 xsavep(fp->fpu_regs.kfpu_u.kfpu_xs, fp->fpu_xsave_mask);
685 fp->fpu_flags |= FPU_VALID;
708 fp_restore(struct fpu_ctx *fp)
712 fpxrestore(fp->fpu_regs.kfpu_u.kfpu_fx);
716 xrestore(fp->fpu_regs.kfpu_u.kfpu_xs, fp->fpu_xsave_mask);
723 fp->fpu_flags &= ~FPU_VALID;
735 struct fpu_ctx *fp = &ttolwp(curthread)->lwp_pcb.pcb_fpu;
738 fp->fpu_xsave_mask = XFEATURE_FP_ALL;
746 installctx(curthread, fp, fpsave_ctxt, fprestore_ctxt, fp_new_lwp,
749 fp->fpu_flags = FPU_EN;
763 struct fpu_ctx *fp = &ttolwp(curthread)->lwp_pcb.pcb_fpu;
766 ASSERT((fp->fpu_flags & FPU_EN) == 0);
772 fp->fpu_xsave_mask = XFEATURE_FP_ALL;
775 installctx(curthread, fp, fpsave_ctxt, fprestore_ctxt, fp_new_lwp,
783 if (fp->fpu_flags & FPU_VALID)
784 fp_restore(fp);
786 ASSERT((fp->fpu_flags & FPU_VALID) == 0);
787 fp->fpu_flags = FPU_EN;
797 struct fpu_ctx *fp = &lwp->lwp_pcb.pcb_fpu;
803 lwp->lwp_fpu = fp->fpu_regs.kfpu_u.kfpu_generic =
813 bzero(fp->fpu_regs.kfpu_u.kfpu_xs, cpuid_get_xsave_size());
820 struct fpu_ctx *fp = &lwp->lwp_pcb.pcb_fpu;
822 if (fp->fpu_regs.kfpu_u.kfpu_generic != NULL) {
824 fp->fpu_regs.kfpu_u.kfpu_generic);
825 lwp->lwp_fpu = fp->fpu_regs.kfpu_u.kfpu_generic = NULL;
868 fpu_ctx_t *fp = &ttolwp(curthread)->lwp_pcb.pcb_fpu;
874 * (NOTE: x87 fp exceptions come thru interrupt gate)
889 fp_save(fp);
894 fpsw = fp->fpu_regs.kfpu_u.kfpu_fx->fx_fsw;
895 fpcw = fp->fpu_regs.kfpu_u.kfpu_fx->fx_fcw;
896 fp->fpu_regs.kfpu_u.kfpu_fx->fx_fsw &= ~FPS_SW_EFLAGS;
900 fpsw = fp->fpu_regs.kfpu_u.kfpu_xs->xs_fxsave.fx_fsw;
901 fpcw = fp->fpu_regs.kfpu_u.kfpu_xs->xs_fxsave.fx_fcw;
902 fp->fpu_regs.kfpu_u.kfpu_xs->xs_fxsave.fx_fsw &= ~FPS_SW_EFLAGS;
907 fp->fpu_regs.kfpu_u.kfpu_xs->xs_xstate_bv |= XFEATURE_LEGACY_FP;
914 fp->fpu_regs.kfpu_status = fpsw;
935 fpu_ctx_t *fp = &ttolwp(curthread)->lwp_pcb.pcb_fpu;
959 fp_save(fp); /* save the FPU state */
962 mxcsr = fp->fpu_regs.kfpu_u.kfpu_xs->xs_fxsave.fx_mxcsr;
963 fp->fpu_regs.kfpu_status =
964 fp->fpu_regs.kfpu_u.kfpu_xs->xs_fxsave.fx_fsw;
966 mxcsr = fp->fpu_regs.kfpu_u.kfpu_fx->fx_mxcsr;
967 fp->fpu_regs.kfpu_status = fp->fpu_regs.kfpu_u.kfpu_fx->fx_fsw;
969 fp->fpu_regs.kfpu_xstatus = mxcsr;
1041 struct fpu_ctx *fp = &curthread->t_lwp->lwp_pcb.pcb_fpu;
1047 if ((fp->fpu_flags & FPU_EN) == 0) {
1068 * pcb, then modify that copy. Next use of the fp will
1071 fp_save(fp);
1075 fx = fp->fpu_regs.kfpu_u.kfpu_fx;
1081 fx = &fp->fpu_regs.kfpu_u.kfpu_xs->xs_fxsave;
1088 fp->fpu_regs.kfpu_u.kfpu_xs->xs_xstate_bv |= XFEATURE_LEGACY_FP;