Lines Matching refs:uint8_t
797 uint8_t qes_min:4; /* minimum entry size */
798 uint8_t qes_max:4; /* maximum entry size */
804 uint8_t psd_rsvd1;
805 uint8_t psd_mps:1; /* Max Power Scale (1.1) */
806 uint8_t psd_nops:1; /* Non-Operational State (1.1) */
807 uint8_t psd_rsvd2:6;
810 uint8_t psd_rrt:5; /* Relative Read Throughput */
811 uint8_t psd_rsvd3:3;
812 uint8_t psd_rrl:5; /* Relative Read Latency */
813 uint8_t psd_rsvd4:3;
814 uint8_t psd_rwt:5; /* Relative Write Throughput */
815 uint8_t psd_rsvd5:3;
816 uint8_t psd_rwl:5; /* Relative Write Latency */
817 uint8_t psd_rsvd6:3;
819 uint8_t psd_rsvd7:6;
820 uint8_t psd_ips:2; /* Idle Power Scale (1.2) */
821 uint8_t psd_rsvd8;
823 uint8_t psd_apw:3; /* Active Power Workload (1.2) */
824 uint8_t psd_rsvd9:3;
825 uint8_t psd_aps:2; /* Active Power Scale */
826 uint8_t psd_rsvd10[9];
841 uint8_t id_rab; /* Recommended Arbitration Burst */
842 uint8_t id_oui[3]; /* vendor IEEE OUI */
844 uint8_t m_multi_pci:1; /* HW has multiple PCIe interfaces */
845 uint8_t m_multi_ctrl:1; /* HW has multiple controllers (1.1) */
846 uint8_t m_sr_iov:1; /* Controller is SR-IOV virt fn (1.1) */
847 uint8_t m_anar_sup:1; /* ANA Reporting Supported (1.4) */
848 uint8_t m_rsvd:4;
850 uint8_t id_mdts; /* Maximum Data Transfer Size */
881 uint8_t id_rsvd_cc[111-102];
882 uint8_t id_cntrltype; /* Controller Type (1.4) */
883 uint8_t id_frguid[16]; /* FRU GUID (1.3) */
887 uint8_t id_rsvd2_cc[240 - 134];
888 uint8_t id_rsvd_nvmemi[253 - 240];
891 uint8_t nvmsr_nvmesd:1; /* NVMe Storage Device */
892 uint8_t nvmsr_nvmee:1; /* NVMe Enclosure */
893 uint8_t nvmsr_rsvd:6;
896 uint8_t vwci_crem:7; /* Write Cycles Remaining */
897 uint8_t vwci_valid:1; /* Write Cycles Remaining Valid */
900 uint8_t mec_smbusme:1; /* SMBus Port Management Endpoint */
901 uint8_t mec_pcieme:1; /* PCIe Port Management Endpoint */
902 uint8_t mec_rsvd:6;
919 uint8_t id_acl; /* Abort Command Limit */
920 uint8_t id_aerl; /* Asynchronous Event Request Limit */
922 uint8_t fw_readonly:1; /* Slot 1 is Read-Only */
923 uint8_t fw_nslot:3; /* number of firmware slots */
924 uint8_t fw_norst:1; /* Activate w/o reset (1.2) */
925 uint8_t fw_rsvd:3;
928 uint8_t lp_smart:1; /* SMART/Health information per NS */
929 uint8_t lp_cmdeff:1; /* Command Effects (1.2) */
930 uint8_t lp_extsup:1; /* Extended Get Log Page (1.2) */
931 uint8_t lp_telemetry:1; /* Telemetry Log Pages (1.3) */
932 uint8_t lp_persist:1; /* Persistent Log Page (1.4) */
933 uint8_t lp_rsvd:3;
935 uint8_t id_elpe; /* Error Log Page Entries */
936 uint8_t id_npss; /* Number of Power States */
938 uint8_t av_spec:1; /* use format from spec */
939 uint8_t av_rsvd:7;
942 uint8_t ap_sup:1; /* APST supported (1.1) */
943 uint8_t ap_rsvd:7;
962 uint8_t dsto_sub:1; /* Subsystem level self-test (1.3) */
963 uint8_t dsto_rsvd:7;
965 uint8_t ap_fwug; /* Firmware Update Granularity (1.3) */
985 uint8_t ap_anatt; /* ANA Transition Time (1.4) */
987 uint8_t anacap_opt:1; /* Optimized State (1.4) */
988 uint8_t anacap_unopt:1; /* Un-optimized State (1.4) */
989 uint8_t anacap_inacc:1; /* Inaccessible State (1.4) */
990 uint8_t anacap_ploss:1; /* Persistent Loss (1.4) */
991 uint8_t anacap_chg:1; /* Change State (1.4 ) */
992 uint8_t anacap_rsvd:1;
993 uint8_t anacap_grpns:1; /* ID Changes with NS Attach (1.4) */
994 uint8_t anacap_grpid:1; /* Supports Group ID (1.4) */
999 uint8_t id_rsvd_ac[512 - 356];
1022 uint8_t fn_format:1; /* Format applies to all NS */
1023 uint8_t fn_sec_erase:1; /* Secure Erase applies to all NS */
1024 uint8_t fn_crypt_erase:1; /* Cryptographic Erase supported */
1025 uint8_t fn_rsvd:5;
1028 uint8_t vwc_present:1; /* Volatile Write Cache present */
1029 uint8_t vwc_nsflush:2; /* Flush with NS ffffffff (1.4) */
1030 uint8_t rsvd:5;
1035 uint8_t nv_spec:1; /* use format from spec */
1036 uint8_t nv_rsvd:7;
1039 uint8_t nwpc_base:1; /* Base support (1.4) */
1040 uint8_t nwpc_wpupc:1; /* Write prot until power cycle (1.4) */
1041 uint8_t nwpc_permwp:1; /* Permanent write prot (1.4) */
1042 uint8_t nwpc_rsvd:5;
1059 uint8_t id_rsvd_nc_4[768 - 544];
1062 uint8_t id_subnqn[1024 - 768]; /* Subsystem Qualified Name (1.2.1+) */
1063 uint8_t id_rsvd_ioc[1792 - 1024];
1064 uint8_t id_nvmof[2048 - 1792]; /* NVMe over Fabrics */
1070 uint8_t id_vs[1024];
1110 uint8_t lbaf_lbads; /* LBA Data Size */
1111 uint8_t lbaf_rp:2; /* Relative Performance */
1112 uint8_t lbaf_rsvd1:6;
1123 uint8_t f_thin:1; /* Thin Provisioning */
1124 uint8_t f_nsabp:1; /* Namespace atomics (1.2) */
1125 uint8_t f_dae:1; /* Deallocated errors supported (1.2) */
1126 uint8_t f_uidreuse:1; /* GUID reuse impossible (1.3) */
1127 uint8_t f_optperf:1; /* Namespace I/O opt (1.4) */
1128 uint8_t f_rsvd:3;
1130 uint8_t id_nlbaf; /* Number of LBA formats */
1132 uint8_t lba_format:4; /* LBA format */
1133 uint8_t lba_extlba:1; /* extended LBA (includes metadata) */
1134 uint8_t lba_rsvd:3;
1137 uint8_t mc_extlba:1; /* extended LBA transfers */
1138 uint8_t mc_separate:1; /* separate metadata transfers */
1139 uint8_t mc_rsvd:6;
1142 uint8_t dp_type1:1; /* Protection Information Type 1 */
1143 uint8_t dp_type2:1; /* Protection Information Type 2 */
1144 uint8_t dp_type3:1; /* Protection Information Type 3 */
1145 uint8_t dp_first:1; /* first 8 bytes of metadata */
1146 uint8_t dp_last:1; /* last 8 bytes of metadata */
1147 uint8_t dp_rsvd:3;
1150 uint8_t dp_pinfo:3; /* Protection Information enabled */
1151 uint8_t dp_first:1; /* first 8 bytes of metadata */
1152 uint8_t dp_rsvd:4;
1155 uint8_t nm_shared:1; /* NS is shared (1.1) */
1156 uint8_t nm_rsvd:7;
1159 uint8_t rc_persist:1; /* Persist Through Power Loss (1.1) */
1160 uint8_t rc_wr_excl:1; /* Write Exclusive (1.1) */
1161 uint8_t rc_excl:1; /* Exclusive Access (1.1) */
1162 uint8_t rc_wr_excl_r:1; /* Wr Excl - Registrants Only (1.1) */
1163 uint8_t rc_excl_r:1; /* Excl Acc - Registrants Only (1.1) */
1164 uint8_t rc_wr_excl_a:1; /* Wr Excl - All Registrants (1.1) */
1165 uint8_t rc_excl_a:1; /* Excl Acc - All Registrants (1.1) */
1166 uint8_t rc_ign_ekey:1; /* Ignore Existing Key (1.3) */
1169 uint8_t fpi_remp:7; /* Percent NVM Format Remaining (1.2) */
1170 uint8_t fpi_sup:1; /* Supported (1.2) */
1172 uint8_t id_dfleat; /* Deallocate Log. Block (1.3) */
1186 uint8_t id_rsvd1[92 - 74];
1188 uint8_t id_rsvd2[99 - 96];
1190 uint8_t nsa_wprot:1; /* Write Protected (1.4) */
1191 uint8_t nsa_rsvd:7;
1195 uint8_t id_nguid[16]; /* Namespace GUID (1.2) */
1196 uint8_t id_eui64[8]; /* IEEE Extended Unique Id (1.1) */
1199 uint8_t id_rsvd3[384 - 192];
1201 uint8_t id_vs[4096 - 384]; /* Vendor Specific */
1219 uint8_t nd_nidt; /* Namespace Identifier Type */
1220 uint8_t nd_nidl; /* Namespace Identifier Length */
1221 uint8_t nd_resv[2];
1222 uint8_t nd_nid[]; /* Namespace Identifier */
1239 uint8_t nipc_crt; /* Controller Resource Types */
1240 uint8_t nipc_rsvd0[32 - 5];
1247 uint8_t nipc_rvsd1[64 - 48];
1254 uint8_t nipc_rsvd2[4096 - 80];
1334 uint8_t el_byte; /* Parameter Error Location byte */
1335 uint8_t el_bit:3; /* Parameter Error Location bit */
1336 uint8_t el_rsvd1:5;
1339 uint8_t el_vendor; /* Vendor Specific Information avail */
1340 uint8_t el_rsvd2[64 - 29];
1345 uint8_t cw_avail:1; /* available space too low */
1346 uint8_t cw_temp:1; /* temperature too high */
1347 uint8_t cw_reliab:1; /* degraded reliability */
1348 uint8_t cw_readonly:1; /* media is read-only */
1349 uint8_t cw_volatile:1; /* volatile memory backup failed */
1350 uint8_t cw_rsvd:3;
1353 uint8_t hl_avail_spare; /* Available Spare */
1354 uint8_t hl_avail_spare_thr; /* Available Spare Threshold */
1355 uint8_t hl_used; /* Percentage Used */
1356 uint8_t hl_rsvd1[32 - 6];
1383 uint8_t hl_rsvd2[512 - 232];
1393 uint8_t fw_afi:3;
1394 uint8_t fw_rsvd1:1;
1396 uint8_t fw_next:3;
1397 uint8_t fw_rsvd2:1;
1398 uint8_t fw_rsvd3[7];
1401 uint8_t fw_rsvd4[512 - 64];
1419 uint8_t cmd_csupp:1; /* Command supported */
1420 uint8_t cmd_lbcc:1; /* Logical block content change */
1421 uint8_t cmd_ncc:1; /* Namespace capability change */
1422 uint8_t cmd_nic:1; /* Namespace inventory change */
1423 uint8_t cmd_ccc:1; /* Controller capability change */
1424 uint8_t cmd_rsvd0p5:3;
1425 uint8_t cmd_rsvd1;
1451 uint8_t cme_rsvd2048[2048];
1524 uint8_t arb_ab:3; /* Arbitration Burst */
1525 uint8_t arb_rsvd:5;
1526 uint8_t arb_lpw; /* Low Priority Weight */
1527 uint8_t arb_mpw; /* Medium Priority Weight */
1528 uint8_t arb_hpw; /* High Priority Weight */
1552 uint8_t lr_type; /* Type */
1554 uint8_t lr_write:1; /* may be overwritten */
1555 uint8_t lr_hidden:1; /* hidden from OS/EFI/BIOS */
1556 uint8_t lr_rsvd1:6;
1558 uint8_t lr_rsvd2[14];
1561 uint8_t lr_guid[16]; /* Unique Identifier */
1562 uint8_t lr_rsvd3[16];
1613 uint8_t ic_thr; /* Aggregation Threshold */
1614 uint8_t ic_time; /* Aggregation Time */
1642 uint8_t aec_avail:1; /* Available space too low */
1643 uint8_t aec_temp:1; /* Temperature too high */
1644 uint8_t aec_reliab:1; /* Degraded reliability */
1645 uint8_t aec_readonly:1; /* Media is read-only */
1646 uint8_t aec_volatile:1; /* Volatile memory backup failed */
1647 uint8_t aec_rsvd1:3;
1648 uint8_t aec_nsan:1; /* Namespace attribute notices (1.2) */
1649 uint8_t aec_fwact:1; /* Firmware activation notices (1.2) */
1650 uint8_t aec_telln:1; /* Telemetry log notices (1.3) */
1651 uint8_t aec_ansacn:1; /* Asymm. NS access change (1.4) */
1652 uint8_t aec_plat:1; /* Predictable latency ev. agg. (1.4) */
1653 uint8_t aec_lbasi:1; /* LBA status information (1.4) */
1654 uint8_t aec_egeal:1; /* Endurance group ev. agg. (1.4) */
1655 uint8_t aec_rsvd2:1;
1656 uint8_t aec_rsvd3[2];
1682 uint8_t spm_pbslc; /* Pre-Boot Software Load Count */
1683 uint8_t spm_rsvd[3];