Lines Matching refs:uint8_t
48 uint8_t Reserved[32];
56 uint8_t BaseVersion; /* version of MAD base format */
57 uint8_t MgmtClass; /* class of operation */
58 uint8_t ClassVersion; /* version of MAD class format */
59 uint8_t R_Method; /* response bit & method to */
63 uint8_t HopPointer; /* index into Initial/Return Paths */
64 uint8_t HopCount; /* number of directed route hops */
88 uint8_t Reserved[28];
92 uint8_t Data[64];
93 uint8_t InitialPath[SM_MAX_DR_PATH];
94 uint8_t ReturnPath[SM_MAX_DR_PATH];
118 uint8_t Reserved[6];
120 uint8_t Padding[32];
130 uint8_t Padding[52];
137 uint8_t PORTNO; /* generator's port */
138 uint8_t Padding[49];
150 uint8_t Padding[44];
159 uint8_t Padding[40];
168 uint8_t METHOD; /* method */
169 uint8_t Reserved2;
173 uint8_t DRSLID; /* SLID of SMP causing notice */
174 uint8_t DRNotice :1; /* notice from a dr SMP */
175 uint8_t DRPathTruncated :1; /* return path is truncated */
176 uint8_t DRHopCount :6; /* num bytes in return path */
177 uint8_t DRNoticeReturnPath[30]; /* return path from the SMP */
186 uint8_t METHOD; /* method */
187 uint8_t Reserved2;
191 uint8_t DRSLID; /* SLID of SMP causing notice */
192 uint8_t DRHopCount :6; /* num bytes in return path */
193 uint8_t DRPathTruncated :1; /* return path is truncated */
194 uint8_t DRNotice :1; /* notice from a dr SMP */
195 uint8_t DRNoticeReturnPath[30]; /* return path from the SMP */
215 uint8_t Padding[4];
232 uint8_t Padding[4];
255 uint8_t PORTNO; /* port number */
256 uint8_t Padding[3];
274 uint8_t PORTNO; /* port number */
275 uint8_t Padding[3];
286 uint8_t NodeString[64]; /* description string */
295 uint8_t BaseVersion; /* supported MAD base version */
296 uint8_t ClassVersion; /* support SMP version */
297 uint8_t NodeType; /* node type(CA, switch, etc) */
298 uint8_t NumPorts; /* # of phys ports on node */
314 uint8_t BaseVersion; /* supported MAD base version */
315 uint8_t ClassVersion; /* support SMP version */
316 uint8_t NodeType; /* node type(CA, switch, etc) */
317 uint8_t NumPorts; /* # of phys ports on node */
345 uint8_t DefaultPort; /* port when DLID not in FDB */
346 uint8_t DefaultMulticastPrimaryPort; /* mcast port when DLID */
348 uint8_t DefaultMulticastNotPrimaryPort; /* mcast port when */
351 uint8_t LifeTimeValue :5; /* time pkt can live in sw */
352 uint8_t PortStateChange :1; /* change in port state value */
353 uint8_t Reserved :2;
356 uint8_t PartitionChecks :4; /* switch enforcement knobs */
357 uint8_t EnhancedPort0 :1; /* enhanced port 0 supported */
358 uint8_t Reserved2 :3;
368 uint8_t DefaultPort; /* port when DLID not in FDB */
369 uint8_t DefaultMulticastPrimaryPort; /* mcast port when DLID */
371 uint8_t DefaultMulticastNotPrimaryPort; /* mcast port when */
374 uint8_t Reserved :2;
375 uint8_t PortStateChange :1; /* change in port state value */
376 uint8_t LifeTimeValue :5; /* time pkt can live in sw */
379 uint8_t Reserved2 :3;
380 uint8_t EnhancedPort0 :1; /* enhanced port 0 supported */
381 uint8_t PartitionChecks :4; /* switch enforcement knobs */
419 uint8_t LocalPortNum; /* port which recvd the MAD */
420 uint8_t LinkWidthEnabled; /* link width(s) enabled */
421 uint8_t LinkWidthSupported; /* widths supported by port */
422 uint8_t LinkWidthActive; /* Currently active width */
423 uint8_t LinkSpeedSupported:4; /* link speed supported */
424 uint8_t PortState :4; /* port state */
425 uint8_t PortPhysicalState:4; /* port physical state */
426 uint8_t LinkDownDefaultState:4; /* see spec description */
427 uint8_t M_KeyProtectBits:2; /* M-key protection bits */
428 uint8_t Reserved :3;
429 uint8_t LMC :3; /* LID mask count */
430 uint8_t LinkSpeedActive :4; /* current active link speed */
431 uint8_t LinkSpeedEnabled:4; /* enabled link speed */
432 uint8_t NeighborMTU :4; /* Active max MTU for port */
433 uint8_t MasterSMSL :4; /* admin SL of master SM */
434 uint8_t VLCap :4; /* virtual lanes supported */
435 uint8_t InitType :4; /* type of init requested */
436 uint8_t VLHighLimit; /* VL high pri limit */
437 uint8_t VLArbitrationHighCap; /* max high pri entries in */
439 uint8_t VLArbitrationLowCap; /* max low pri entries */
440 uint8_t InitTypeReply :4; /* type of init performed */
441 uint8_t MTUCap :4; /* max MTU supported */
442 uint8_t VLStallCount :3; /* # pkts to enter stall st. */
443 uint8_t HOQLife :5; /* time pkt can live at HOQ */
444 uint8_t OperationalVLs :4; /* virtual lanes operational */
445 uint8_t PartitionChecks :4; /* port enforcement knbos */
449 uint8_t GUIDCap; /* number of GUIDs supported */
450 uint8_t ClientRereg :1; /* Client ReReg supported */
451 uint8_t Reserved2 :2;
452 uint8_t SubnetTimeOut :5; /* defines subnet prop. dely */
453 uint8_t Reserved3 :3;
454 uint8_t RespTimeValue :5; /* defines resp time to SMPs */
455 uint8_t LocalPhyErrors :4; /* threshold for errors */
456 uint8_t OverrunErrors :4; /* threshold for errors */
469 uint8_t LocalPortNum; /* port which recvd the MAD */
470 uint8_t LinkWidthEnabled; /* link width(s) enabled */
471 uint8_t LinkWidthSupported; /* widths supported by port */
472 uint8_t LinkWidthActive; /* Currently active width */
473 uint8_t PortState :4; /* port state */
474 uint8_t LinkSpeedSupported:4; /* link speed supported */
475 uint8_t LinkDownDefaultState:4; /* see spec description */
476 uint8_t PortPhysicalState:4; /* port physical state */
477 uint8_t LMC :3; /* LID mask count */
478 uint8_t Reserved :3;
479 uint8_t M_KeyProtectBits:2; /* M-key protection bits */
480 uint8_t LinkSpeedEnabled:4; /* enabled link speed */
481 uint8_t LinkSpeedActive :4; /* current active link speed */
482 uint8_t MasterSMSL :4; /* admin SL of master SM */
483 uint8_t NeighborMTU :4; /* Active max MTU for port */
484 uint8_t InitType :4; /* type of init requested */
485 uint8_t VLCap :4; /* virtual lanes supported */
486 uint8_t VLHighLimit; /* VL high pri limit */
487 uint8_t VLArbitrationHighCap; /* max high pri entries in */
489 uint8_t VLArbitrationLowCap; /* max low pri entries */
490 uint8_t MTUCap :4; /* max MTU supported */
491 uint8_t InitTypeReply :4; /* type of init performed */
492 uint8_t HOQLife :5; /* time pkt can live at HOQ */
493 uint8_t VLStallCount :3; /* # pkts to enter stall st. */
494 uint8_t PartitionChecks :4; /* port enforcement knbos */
495 uint8_t OperationalVLs :4; /* virtual lanes operational */
499 uint8_t GUIDCap; /* number of GUIDs supported */
500 uint8_t SubnetTimeOut :5; /* defines subnet prop. dely */
501 uint8_t Reserved2 :2;
502 uint8_t ClientRereg :1; /* Client ReReg supported */
503 uint8_t RespTimeValue :5; /* defines resp time to SMPs */
504 uint8_t Reserved3 :3;
505 uint8_t OverrunErrors :4; /* threshold for errors */
506 uint8_t LocalPhyErrors :4; /* threshold for errors */
663 uint8_t SL0toVL :4;
664 uint8_t SL1toVL :4;
665 uint8_t SL2toVL :4;
666 uint8_t SL3toVL :4;
667 uint8_t SL4toVL :4;
668 uint8_t SL5toVL :4;
669 uint8_t SL6toVL :4;
670 uint8_t SL7toVL :4;
671 uint8_t SL8toVL :4;
672 uint8_t SL9toVL :4;
673 uint8_t SL10toVL :4;
674 uint8_t SL11toVL :4;
675 uint8_t SL12toVL :4;
676 uint8_t SL13toVL :4;
677 uint8_t SL14toVL :4;
678 uint8_t SL15toVL :4;
684 uint8_t SL1toVL :4;
685 uint8_t SL0toVL :4;
686 uint8_t SL3toVL :4;
687 uint8_t SL2toVL :4;
688 uint8_t SL5toVL :4;
689 uint8_t SL4toVL :4;
690 uint8_t SL7toVL :4;
691 uint8_t SL6toVL :4;
692 uint8_t SL9toVL :4;
693 uint8_t SL8toVL :4;
694 uint8_t SL11toVL :4;
695 uint8_t SL10toVL :4;
696 uint8_t SL13toVL :4;
697 uint8_t SL12toVL :4;
698 uint8_t SL15toVL :4;
699 uint8_t SL14toVL :4;
707 uint8_t Reserved :4;
708 uint8_t VL :4; /* VL assoc. with this element */
709 uint8_t Weight; /* weight assoc. with this element */
729 uint8_t PortBlocks[64];
736 uint8_t Valid :1; /* this LID/Port pair is valid */
737 uint8_t LMC :3; /* the LMC of this lid */
738 uint8_t Reserved :4;
739 uint8_t Port; /* port to forward entries to */
746 uint8_t Reserved :4;
747 uint8_t LMC :3; /* the LMC of this lid */
748 uint8_t Valid :1; /* this LID/Port pair is valid */
749 uint8_t Port; /* port to forward entries to */
774 uint8_t Priority :4; /* priority */
775 uint8_t SMState :4; /* SM's state */
784 uint8_t SMState :4; /* SM's state */
785 uint8_t Priority :4; /* priority */
827 uint8_t DiagData[62]; /* vendor specific diag info */