Lines Matching defs:n
41 #define VIR_ID_SHIFT(n) (n << NPI_PORT_CHAN_SHIFT) argument
71 #define NPI_VIR_OCODE_INVALID(n) (VIR_ID_SHIFT(n) | VIR_ERR_ST | OPCODE_INVALID) argument
72 #define NPI_VIR_FUNC_INVALID(n) (VIR_ID_SHIFT(n) | VIR_ERR_ST | FUNCID_INVALID) argument
73 #define NPI_VIR_CN_INVALID(n) (VIR_ID_SHIFT(n) | VIR_ERR_ST | CHANNEL_INVALID) argument
78 #define NPI_VIR_TAS_BUSY(n) (VIR_ID_SHIFT(n) | VIR_ERR_ST | VIR_TAS_BUSY) argument
79 #define NPI_VIR_TAS_NOTREAD(n) (VIR_ID_SHIFT(n) | VIR_ERR_ST | VIR_TAS_NOTREAD) argument
80 #define NPI_VIR_SR_RESET(n) (VIR_ID_SHIFT(n) | VIR_ERR_ST | VIR_SR_RESET) argument
81 #define NPI_VIR_SR_FREE(n) (VIR_ID_SHIFT(n) | VIR_ERR_ST | VIR_SR_FREE) argument
82 #define NPI_VIR_SR_BUSY(n) (VIR_ID_SHIFT(n) | VIR_ERR_ST | VIR_SR_BUSY) argument
83 #define NPI_VIR_SR_INVALID(n) (VIR_ID_SHIFT(n) | VIR_ERR_ST | VIR_SR_INVALID) argument
84 #define NPI_VIR_SR_NOTOWNER(n) (VIR_ID_SHIFT(n) | VIR_ERR_ST | VIR_SR_NOTOWNER) argument
85 #define NPI_VIR_SR_INITIALIZED(n) (VIR_ID_SHIFT(n) | \ argument
96 #define NPI_VIR_BD_FUNC_INVALID(n) (VIR_ID_SHIFT(n) | \ argument
98 #define NPI_VIR_BD_REG_INVALID(n) (VIR_ID_SHIFT(n) | \ argument
100 #define NPI_VIR_BD_ID_INVALID(n) (VIR_ID_SHIFT(n) | \ argument
102 #define NPI_VIR_BD_TXDMA_INVALID(n) (VIR_ID_SHIFT(n) | \ argument
104 #define NPI_VIR_BD_RXDMA_INVALID(n) (VIR_ID_SHIFT(n) | \ argument
110 #define NPI_VIR_LD_INVALID(n) (VIR_ID_SHIFT(n) | VIR_ERR_ST | VIR_LD_INVALID) argument
111 #define NPI_VIR_LDG_INVALID(n) (VIR_ID_SHIFT(n) | VIR_ERR_ST | VIR_LDG_INVALID) argument
112 #define NPI_VIR_LDSV_INVALID(n) (VIR_ID_SHIFT(n) | \ argument
114 #define NPI_VIR_INTM_TM_INVALID(n) (VIR_ID_SHIFT(n) | \ argument
117 #define NPI_VIR_SID_VEC_INVALID(n) (VIR_ID_SHIFT(n) | \ argument
161 #define DMA_BIND_TX_VALIDATE(n, status) \ argument
169 #define DMA_BIND_RX_VALIDATE(n, status) \ argument