Lines Matching refs:outb
193 outb(chan_addr[chnl].mask_reg, (chnl & 3) | DMA_SETMSK); in d37A_dma_disable()
212 outb(chan_addr[chnl].mask_reg, chnl & 3); in d37A_dma_enable()
295 outb(chan_addr[chnl].scm_reg, chnl | EISA_ENCM | EISA_CMOK); in dEISA_setchain()
300 outb(chan_addr[chnl].scm_reg, chnl); in dEISA_setchain()
387 outb(chan_addr[chnl].scm_reg, chnl | EISA_ENCM); in d37A_prog_chan()
470 outb(chan_addr[chnl].scm_reg, chnl | EISA_ENCM); in d37A_dma_swsetup()
494 outb(chan_addr[chnl].reqt_reg, DMA_SETMSK | chnl); /* set request bit */ in d37A_dma_swstart()
513 outb(chan_addr[chnl].reqt_reg, chnl & 3); /* reset request bit */ in d37A_dma_stop()
605 outb(chan_addr[chnl].mode_reg, mode); in d37A_set_mode()
643 outb(chan_addr[chnl].emode_reg, emode); in d37A_set_mode()
687 outb(chan_addr[chnl].ff_reg, 0); /* set flipflop */ in d37A_write_addr()
690 outb(chan_addr[chnl].addr_reg, adr_byte[0]); in d37A_write_addr()
691 outb(chan_addr[chnl].addr_reg, adr_byte[1]); in d37A_write_addr()
692 outb(chan_addr[chnl].page_reg, adr_byte[2]); in d37A_write_addr()
694 outb(chan_addr[chnl].hpage_reg, adr_byte[3]); in d37A_write_addr()
718 outb(chan_addr[chnl].ff_reg, 0); /* set flipflop */ in d37A_read_addr()
787 outb(chan_addr[chnl].ff_reg, 0); /* set flipflop */ in d37A_write_count()
790 outb(chan_addr[chnl].cnt_reg, count_byte[0]); in d37A_write_count()
791 outb(chan_addr[chnl].cnt_reg, count_byte[1]); in d37A_write_count()
793 outb(chan_addr[chnl].hcnt_reg, count_byte[2]); in d37A_write_count()
817 outb(chan_addr[chnl].ff_reg, 0); /* set flipflop */ in d37A_read_count()