Lines Matching refs:handle
32 static hpi_status_t hpi_txdma_control_reset_wait(hpi_handle_t handle,
36 hpi_txdma_log_page_handle_set(hpi_handle_t handle, uint8_t channel, in hpi_txdma_log_page_handle_set() argument
42 HPI_ERROR_MSG((handle.function, HPI_ERR_CTL, in hpi_txdma_log_page_handle_set()
48 TXDMA_REG_WRITE64(handle, TDC_PAGE_HANDLE, channel, hdl_p->value); in hpi_txdma_log_page_handle_set()
54 hpi_txdma_channel_reset(hpi_handle_t handle, uint8_t channel) in hpi_txdma_channel_reset() argument
56 HPI_DEBUG_MSG((handle.function, HPI_TDC_CTL, in hpi_txdma_channel_reset()
58 return (hpi_txdma_channel_control(handle, TXDMA_RESET, channel)); in hpi_txdma_channel_reset()
62 hpi_txdma_channel_init_enable(hpi_handle_t handle, uint8_t channel) in hpi_txdma_channel_init_enable() argument
64 return (hpi_txdma_channel_control(handle, TXDMA_INIT_START, channel)); in hpi_txdma_channel_init_enable()
68 hpi_txdma_channel_enable(hpi_handle_t handle, uint8_t channel) in hpi_txdma_channel_enable() argument
70 return (hpi_txdma_channel_control(handle, TXDMA_START, channel)); in hpi_txdma_channel_enable()
74 hpi_txdma_channel_disable(hpi_handle_t handle, uint8_t channel) in hpi_txdma_channel_disable() argument
76 return (hpi_txdma_channel_control(handle, TXDMA_STOP, channel)); in hpi_txdma_channel_disable()
80 hpi_txdma_channel_mbox_enable(hpi_handle_t handle, uint8_t channel) in hpi_txdma_channel_mbox_enable() argument
82 return (hpi_txdma_channel_control(handle, TXDMA_MBOX_ENABLE, channel)); in hpi_txdma_channel_mbox_enable()
86 hpi_txdma_channel_control(hpi_handle_t handle, txdma_cs_cntl_t control, in hpi_txdma_channel_control() argument
94 HPI_ERROR_MSG((handle.function, HPI_ERR_CTL, in hpi_txdma_channel_control()
103 TXDMA_REG_READ64(handle, TDC_TDR_CFG, channel, &cfg.value); in hpi_txdma_channel_control()
105 TXDMA_REG_WRITE64(handle, TDC_TDR_CFG, channel, cfg.value); in hpi_txdma_channel_control()
106 return (hpi_txdma_control_reset_wait(handle, channel)); in hpi_txdma_channel_control()
110 TXDMA_REG_READ64(handle, TDC_TDR_CFG, channel, &cfg.value); in hpi_txdma_channel_control()
112 TXDMA_REG_WRITE64(handle, TDC_TDR_CFG, channel, cfg.value); in hpi_txdma_channel_control()
122 TXDMA_REG_WRITE64(handle, TDC_TDR_CFG, channel, cfg.value); in hpi_txdma_channel_control()
123 return (hpi_txdma_control_reset_wait(handle, channel)); in hpi_txdma_channel_control()
127 TXDMA_REG_READ64(handle, TDC_TDR_CFG, channel, &cfg.value); in hpi_txdma_channel_control()
129 TXDMA_REG_WRITE64(handle, TDC_TDR_CFG, channel, cfg.value); in hpi_txdma_channel_control()
134 TXDMA_REG_READ64(handle, TDC_TDR_CFG, channel, &cfg.value); in hpi_txdma_channel_control()
136 TXDMA_REG_WRITE64(handle, TDC_TDR_CFG, channel, cfg.value); in hpi_txdma_channel_control()
137 status = hpi_txdma_control_stop_wait(handle, channel); in hpi_txdma_channel_control()
139 HPI_ERROR_MSG((handle.function, HPI_ERR_CTL, in hpi_txdma_channel_control()
149 TXDMA_REG_READ64(handle, TDC_STAT, channel, &cs.value); in hpi_txdma_channel_control()
151 TXDMA_REG_WRITE64(handle, TDC_STAT, channel, cs.value); in hpi_txdma_channel_control()
156 HPI_ERROR_MSG((handle.function, HPI_ERR_CTL, in hpi_txdma_channel_control()
165 hpi_txdma_control_status(hpi_handle_t handle, io_op_t op_mode, uint8_t channel, in hpi_txdma_control_status() argument
172 HPI_ERROR_MSG((handle.function, HPI_ERR_CTL, in hpi_txdma_control_status()
179 TXDMA_REG_READ64(handle, TDC_STAT, channel, &cs_p->value); in hpi_txdma_control_status()
183 TXDMA_REG_WRITE64(handle, TDC_STAT, channel, cs_p->value); in hpi_txdma_control_status()
187 TXDMA_REG_READ64(handle, TDC_STAT, channel, &txcs.value); in hpi_txdma_control_status()
188 TXDMA_REG_WRITE64(handle, TDC_STAT, channel, in hpi_txdma_control_status()
193 HPI_ERROR_MSG((handle.function, HPI_ERR_CTL, in hpi_txdma_control_status()
203 hpi_txdma_event_mask(hpi_handle_t handle, io_op_t op_mode, uint8_t channel, in hpi_txdma_event_mask() argument
210 HPI_ERROR_MSG((handle.function, HPI_ERR_CTL, in hpi_txdma_event_mask()
217 TXDMA_REG_READ64(handle, TDC_INT_MASK, channel, &mask_p->value); in hpi_txdma_event_mask()
221 TXDMA_REG_WRITE64(handle, TDC_INT_MASK, channel, mask_p->value); in hpi_txdma_event_mask()
225 TXDMA_REG_READ64(handle, TDC_INT_MASK, channel, &mask.value); in hpi_txdma_event_mask()
226 TXDMA_REG_WRITE64(handle, TDC_INT_MASK, channel, in hpi_txdma_event_mask()
231 HPI_ERROR_MSG((handle.function, HPI_ERR_CTL, in hpi_txdma_event_mask()
241 hpi_txdma_ring_config(hpi_handle_t handle, io_op_t op_mode, in hpi_txdma_ring_config() argument
247 HPI_ERROR_MSG((handle.function, HPI_ERR_CTL, in hpi_txdma_ring_config()
254 TXDMA_REG_READ64(handle, TDC_TDR_CFG, channel, reg_data); in hpi_txdma_ring_config()
258 TXDMA_REG_WRITE64(handle, TDC_TDR_CFG, channel, *reg_data); in hpi_txdma_ring_config()
262 HPI_ERROR_MSG((handle.function, HPI_ERR_CTL, in hpi_txdma_ring_config()
272 hpi_txdma_mbox_config(hpi_handle_t handle, io_op_t op_mode, in hpi_txdma_mbox_config() argument
280 HPI_ERROR_MSG((handle.function, HPI_ERR_CTL, in hpi_txdma_mbox_config()
290 TXDMA_REG_READ64(handle, TDC_MBH, channel, &mh.value); in hpi_txdma_mbox_config()
291 TXDMA_REG_READ64(handle, TDC_MBL, channel, &ml.value); in hpi_txdma_mbox_config()
299 TXDMA_REG_WRITE64(handle, TDC_MBL, channel, ml.value); in hpi_txdma_mbox_config()
302 TXDMA_REG_WRITE64(handle, TDC_MBH, channel, mh.value); in hpi_txdma_mbox_config()
306 HPI_ERROR_MSG((handle.function, HPI_ERR_CTL, in hpi_txdma_mbox_config()
319 hpi_txdma_desc_gather_set(hpi_handle_t handle, p_tx_desc_t desc_p, in hpi_txdma_desc_gather_set() argument
327 HPI_ERROR_MSG((handle.function, HPI_ERR_CTL, in hpi_txdma_desc_gather_set()
333 HPI_ERROR_MSG((handle.function, HPI_ERR_CTL, in hpi_txdma_desc_gather_set()
342 HPI_DEBUG_MSG((handle.function, HPI_TDC_CTL, in hpi_txdma_desc_gather_set()
350 HPI_DEBUG_MSG((handle.function, HPI_TDC_CTL, in hpi_txdma_desc_gather_set()
354 HXGE_MEM_PIO_WRITE64(handle, desc_p->value); in hpi_txdma_desc_gather_set()
360 hpi_txdma_desc_set_zero(hpi_handle_t handle, uint16_t entries) in hpi_txdma_desc_set_zero() argument
370 HXGE_REG_WR64(handle, offset, 0); in hpi_txdma_desc_set_zero()
381 hpi_txdma_ring_head_get(hpi_handle_t handle, uint8_t channel, in hpi_txdma_ring_head_get() argument
387 HPI_ERROR_MSG((handle.function, HPI_ERR_CTL, in hpi_txdma_ring_head_get()
392 TXDMA_REG_READ64(handle, TDC_TDR_HEAD, channel, &hdl_p->value); in hpi_txdma_ring_head_get()
402 hpi_txdma_dump_desc_one(hpi_handle_t handle, p_tx_desc_t desc_p, int desc_index) in hpi_txdma_dump_desc_one() argument
411 HPI_DEBUG_MSG((handle.function, HPI_TDC_CTL, in hpi_txdma_dump_desc_one()
416 HXGE_MEM_PIO_READ64(handle, &desp->value); in hpi_txdma_dump_desc_one()
422 HPI_DEBUG_MSG((handle.function, HPI_TDC_CTL, "\n\t: value 0x%llx\n" in hpi_txdma_dump_desc_one()
427 HPI_DEBUG_MSG((handle.function, HPI_TDC_CTL, in hpi_txdma_dump_desc_one()
435 hpi_txdma_control_reset_wait(hpi_handle_t handle, uint8_t channel) in hpi_txdma_control_reset_wait() argument
443 TXDMA_REG_READ64(handle, TDC_TDR_CFG, channel, &txcs.value); in hpi_txdma_control_reset_wait()
455 HPI_ERROR_MSG((handle.function, HPI_ERR_CTL, in hpi_txdma_control_reset_wait()
464 hpi_txdma_control_stop_wait(hpi_handle_t handle, uint8_t channel) in hpi_txdma_control_stop_wait() argument
472 TXDMA_REG_READ64(handle, TDC_TDR_CFG, channel, &txcs.value); in hpi_txdma_control_stop_wait()
480 HPI_ERROR_MSG((handle.function, HPI_ERR_CTL, in hpi_txdma_control_stop_wait()