Lines Matching refs:off
419 ql_8021_pci_set_crbwindow_2M(ql_adapter_state_t *ha, uint64_t *off) in ql_8021_pci_set_crbwindow_2M() argument
423 crb_win = (uint32_t)CRB_HI(*off); in ql_8021_pci_set_crbwindow_2M()
433 "off=0x%llx\n", crb_win, win_read, *off); in ql_8021_pci_set_crbwindow_2M()
435 *off = (*off & MASK(16)) + CRB_INDIRECT_2M + (uintptr_t)ha->nx_pcibase; in ql_8021_pci_set_crbwindow_2M()
439 ql_8021_wr_32(ql_adapter_state_t *ha, uint64_t off, uint32_t data) in ql_8021_wr_32() argument
443 rv = ql_8021_pci_get_crb_addr_2M(ha, &off); in ql_8021_wr_32()
450 ql_8021_pci_set_crbwindow_2M(ha, &off); in ql_8021_wr_32()
453 WRT_REG_DWORD(ha, (uintptr_t)off, data); in ql_8021_wr_32()
461 ql_8021_rd_32(ql_adapter_state_t *ha, uint64_t off, uint32_t *data) in ql_8021_rd_32() argument
466 rv = ql_8021_pci_get_crb_addr_2M(ha, &off); in ql_8021_rd_32()
474 ql_8021_pci_set_crbwindow_2M(ha, &off); in ql_8021_rd_32()
476 n = RD_REG_DWORD(ha, (uintptr_t)off); in ql_8021_rd_32()
519 ql_8021_pci_get_crb_addr_2M(ql_adapter_state_t *ha, uint64_t *off) in ql_8021_pci_get_crb_addr_2M() argument
523 if (*off >= UNM_CRB_MAX) { in ql_8021_pci_get_crb_addr_2M()
524 EL(ha, "%llx >= %llx\n", *off, UNM_CRB_MAX); in ql_8021_pci_get_crb_addr_2M()
528 if (*off >= UNM_PCI_CAMQM && (*off < UNM_PCI_CAMQM_2M_END)) { in ql_8021_pci_get_crb_addr_2M()
529 *off = (*off - UNM_PCI_CAMQM) + UNM_PCI_CAMQM_2M_BASE + in ql_8021_pci_get_crb_addr_2M()
534 if (*off < UNM_PCI_CRBSPACE) { in ql_8021_pci_get_crb_addr_2M()
535 EL(ha, "%llx < %llx\n", *off, UNM_PCI_CRBSPACE); in ql_8021_pci_get_crb_addr_2M()
539 *off -= UNM_PCI_CRBSPACE; in ql_8021_pci_get_crb_addr_2M()
544 m = &crb_128M_2M_map[CRB_BLK(*off)].sub_block[CRB_SUBBLK(*off)]; in ql_8021_pci_get_crb_addr_2M()
546 if (m->valid && ((uint64_t)m->start_128M <= *off) && in ql_8021_pci_get_crb_addr_2M()
547 ((uint64_t)m->end_128M > *off)) { in ql_8021_pci_get_crb_addr_2M()
548 *off = (uint64_t)(*off + m->start_2M - m->start_128M + in ql_8021_pci_get_crb_addr_2M()
678 ql_8021_pci_mem_read_direct(ql_adapter_state_t *ha, uint64_t off, void *data, in ql_8021_pci_mem_read_direct() argument
689 if (((start = ql_8021_pci_set_window(ha, off)) == -1UL) || in ql_8021_pci_mem_read_direct()
690 (ql_8021_pci_is_same_window(ha, off + size - 1) == 0)) { in ql_8021_pci_mem_read_direct()
692 off); in ql_8021_pci_mem_read_direct()
721 ql_8021_pci_mem_write_direct(ql_adapter_state_t *ha, uint64_t off, void *data, in ql_8021_pci_mem_write_direct() argument
732 if (((start = ql_8021_pci_set_window(ha, off)) == -1UL) || in ql_8021_pci_mem_write_direct()
733 (ql_8021_pci_is_same_window(ha, off + size -1) == 0)) { in ql_8021_pci_mem_write_direct()
735 off); in ql_8021_pci_mem_write_direct()
764 ql_8021_pci_mem_read_2M(ql_adapter_state_t *ha, uint64_t off, void *data, in ql_8021_pci_mem_read_2M() argument
776 if (off >= UNM_ADDR_QDR_NET && off <= NX_P3_ADDR_QDR_NET_MAX) { in ql_8021_pci_mem_read_2M()
780 if (ql_8021_pci_mem_bound_check(ha, off, size) == 0) { in ql_8021_pci_mem_read_2M()
781 return (ql_8021_pci_mem_read_direct(ha, off, data, in ql_8021_pci_mem_read_2M()
787 off8 = off & 0xfffffff0; in ql_8021_pci_mem_read_2M()
788 off0[0] = off & 0xf; in ql_8021_pci_mem_read_2M()
793 off8 = off & 0xfffffff8; in ql_8021_pci_mem_read_2M()
794 off0[0] = off & 0x7; in ql_8021_pci_mem_read_2M()
875 ql_8021_pci_mem_write_2M(ql_adapter_state_t *ha, uint64_t off, void *data, in ql_8021_pci_mem_write_2M() argument
886 if (off >= UNM_ADDR_QDR_NET && off <= NX_P3_ADDR_QDR_NET_MAX) { in ql_8021_pci_mem_write_2M()
890 if (ql_8021_pci_mem_bound_check(ha, off, size) == 0) { in ql_8021_pci_mem_write_2M()
891 return (ql_8021_pci_mem_write_direct(ha, off, data, in ql_8021_pci_mem_write_2M()
896 off0 = off & 0x7; in ql_8021_pci_mem_write_2M()
901 off8 = off & 0xfffffff0; in ql_8021_pci_mem_write_2M()
902 loop = (uint32_t)((((off & 0xf) + size - 1) >> 4) + 1); in ql_8021_pci_mem_write_2M()
906 startword = (uint32_t)((off & 0xf) / 8); in ql_8021_pci_mem_write_2M()
908 off8 = off & 0xfffffff8; in ql_8021_pci_mem_write_2M()
1378 uint32_t offset, off, i, n, addr, val; in ql_8021_pinit_from_rom() local
1419 off = ql_8021_decode_crb_addr(ha, buf[i].addr); in ql_8021_pinit_from_rom()
1420 if (off == ADDR_ERROR) { in ql_8021_pinit_from_rom()
1424 off += UNM_PCI_CRBSPACE; in ql_8021_pinit_from_rom()
1426 if (off & 1) { in ql_8021_pinit_from_rom()
1431 if (off == UNM_RAM_COLD_BOOT) { in ql_8021_pinit_from_rom()
1434 if (off == (UNM_CRB_I2C0 + 0x1c)) { in ql_8021_pinit_from_rom()
1438 if (off == (ROMUSB_GLB + 0xbc)) { in ql_8021_pinit_from_rom()
1441 if (off == (ROMUSB_GLB + 0xa8)) { in ql_8021_pinit_from_rom()
1444 if (off == (ROMUSB_GLB + 0xc8)) { /* core clock */ in ql_8021_pinit_from_rom()
1447 if (off == (ROMUSB_GLB + 0x24)) { /* MN clock */ in ql_8021_pinit_from_rom()
1450 if (off == (ROMUSB_GLB + 0x1c)) { /* MS clock */ in ql_8021_pinit_from_rom()
1453 if ((off & 0x0ff00000) == UNM_CRB_DDR_NET) { in ql_8021_pinit_from_rom()
1456 if (off == (UNM_CRB_PEG_NET_1 + 0x18) && in ql_8021_pinit_from_rom()
1461 if (off == UNM_PCIE_REG(PCIE_SETUP_FUNCTION)) { in ql_8021_pinit_from_rom()
1464 if (off == UNM_PCIE_REG(PCIE_SETUP_FUNCTION2)) { in ql_8021_pinit_from_rom()
1467 if ((off & 0x0ff00000) == UNM_CRB_SMB) { in ql_8021_pinit_from_rom()
1474 if (off == UNM_ROMUSB_GLB_SW_RESET) { in ql_8021_pinit_from_rom()
1478 ql_8021_wr_32(ha, off, buf[i].data); in ql_8021_pinit_from_rom()