Lines Matching refs:ret_val

204 	s32 ret_val = 0;  in e1000_phy_is_accessible_pchlan()  local
209 ret_val = hw->phy.ops.read_reg_locked(hw, PHY_ID1, &phy_reg); in e1000_phy_is_accessible_pchlan()
210 if (ret_val || (phy_reg == 0xFFFF)) in e1000_phy_is_accessible_pchlan()
214 ret_val = hw->phy.ops.read_reg_locked(hw, PHY_ID2, &phy_reg); in e1000_phy_is_accessible_pchlan()
215 if (ret_val || (phy_reg == 0xFFFF)) { in e1000_phy_is_accessible_pchlan()
237 ret_val = e1000_set_mdio_slow_mode_hv(hw); in e1000_phy_is_accessible_pchlan()
238 if (!ret_val) in e1000_phy_is_accessible_pchlan()
239 ret_val = e1000_get_phy_id(hw); in e1000_phy_is_accessible_pchlan()
243 if (ret_val) in e1000_phy_is_accessible_pchlan()
319 s32 ret_val; in e1000_init_phy_workarounds_pchlan() local
334 ret_val = hw->phy.ops.acquire(hw); in e1000_init_phy_workarounds_pchlan()
335 if (ret_val) { in e1000_init_phy_workarounds_pchlan()
385 ret_val = -E1000_ERR_PHY; in e1000_init_phy_workarounds_pchlan()
405 ret_val = -E1000_ERR_PHY; in e1000_init_phy_workarounds_pchlan()
413 if (!ret_val) { in e1000_init_phy_workarounds_pchlan()
426 ret_val = e1000_phy_hw_reset_generic(hw); in e1000_init_phy_workarounds_pchlan()
427 if (ret_val) in e1000_init_phy_workarounds_pchlan()
436 ret_val = hw->phy.ops.check_reset_block(hw); in e1000_init_phy_workarounds_pchlan()
437 if (ret_val) in e1000_init_phy_workarounds_pchlan()
449 return ret_val; in e1000_init_phy_workarounds_pchlan()
461 s32 ret_val; in e1000_init_phy_params_pchlan() local
488 ret_val = e1000_init_phy_workarounds_pchlan(hw); in e1000_init_phy_params_pchlan()
489 if (ret_val) in e1000_init_phy_params_pchlan()
490 return ret_val; in e1000_init_phy_params_pchlan()
495 ret_val = e1000_get_phy_id(hw); in e1000_init_phy_params_pchlan()
496 if (ret_val) in e1000_init_phy_params_pchlan()
497 return ret_val; in e1000_init_phy_params_pchlan()
516 ret_val = e1000_set_mdio_slow_mode_hv(hw); in e1000_init_phy_params_pchlan()
517 if (ret_val) in e1000_init_phy_params_pchlan()
518 return ret_val; in e1000_init_phy_params_pchlan()
519 ret_val = e1000_get_phy_id(hw); in e1000_init_phy_params_pchlan()
520 if (ret_val) in e1000_init_phy_params_pchlan()
521 return ret_val; in e1000_init_phy_params_pchlan()
544 ret_val = -E1000_ERR_PHY; in e1000_init_phy_params_pchlan()
548 return ret_val; in e1000_init_phy_params_pchlan()
560 s32 ret_val; in e1000_init_phy_params_ich8lan() local
584 ret_val = e1000_determine_phy_address(hw); in e1000_init_phy_params_ich8lan()
585 if (ret_val) { in e1000_init_phy_params_ich8lan()
588 ret_val = e1000_determine_phy_address(hw); in e1000_init_phy_params_ich8lan()
589 if (ret_val) { in e1000_init_phy_params_ich8lan()
591 return ret_val; in e1000_init_phy_params_ich8lan()
599 ret_val = e1000_get_phy_id(hw); in e1000_init_phy_params_ich8lan()
600 if (ret_val) in e1000_init_phy_params_ich8lan()
601 return ret_val; in e1000_init_phy_params_ich8lan()
870 s32 ret_val; in __e1000_access_emi_reg_locked() local
874 ret_val = hw->phy.ops.write_reg_locked(hw, I82579_EMI_ADDR, address); in __e1000_access_emi_reg_locked()
875 if (ret_val) in __e1000_access_emi_reg_locked()
876 return ret_val; in __e1000_access_emi_reg_locked()
879 ret_val = hw->phy.ops.read_reg_locked(hw, I82579_EMI_DATA, in __e1000_access_emi_reg_locked()
882 ret_val = hw->phy.ops.write_reg_locked(hw, I82579_EMI_DATA, in __e1000_access_emi_reg_locked()
885 return ret_val; in __e1000_access_emi_reg_locked()
935 s32 ret_val; in e1000_set_eee_pchlan() local
955 ret_val = hw->phy.ops.acquire(hw); in e1000_set_eee_pchlan()
956 if (ret_val) in e1000_set_eee_pchlan()
957 return ret_val; in e1000_set_eee_pchlan()
959 ret_val = hw->phy.ops.read_reg_locked(hw, I82579_LPI_CTRL, &lpi_ctrl); in e1000_set_eee_pchlan()
960 if (ret_val) in e1000_set_eee_pchlan()
969 ret_val = e1000_read_emi_reg_locked(hw, lpa, in e1000_set_eee_pchlan()
971 if (ret_val) in e1000_set_eee_pchlan()
975 ret_val = e1000_read_emi_reg_locked(hw, adv_addr, &adv); in e1000_set_eee_pchlan()
976 if (ret_val) in e1000_set_eee_pchlan()
1000 ret_val = e1000_read_emi_reg_locked(hw, I82579_LPI_PLL_SHUT, in e1000_set_eee_pchlan()
1002 if (ret_val) in e1000_set_eee_pchlan()
1006 ret_val = e1000_write_emi_reg_locked(hw, I82579_LPI_PLL_SHUT, in e1000_set_eee_pchlan()
1011 ret_val = e1000_read_emi_reg_locked(hw, pcs_status, &data); in e1000_set_eee_pchlan()
1012 if (ret_val) in e1000_set_eee_pchlan()
1015 ret_val = hw->phy.ops.write_reg_locked(hw, I82579_LPI_CTRL, lpi_ctrl); in e1000_set_eee_pchlan()
1019 return ret_val; in e1000_set_eee_pchlan()
1037 s32 ret_val = E1000_SUCCESS; in e1000_k1_workaround_lpt_lp() local
1041 ret_val = hw->phy.ops.acquire(hw); in e1000_k1_workaround_lpt_lp()
1042 if (ret_val) in e1000_k1_workaround_lpt_lp()
1043 return ret_val; in e1000_k1_workaround_lpt_lp()
1045 ret_val = in e1000_k1_workaround_lpt_lp()
1048 if (ret_val) in e1000_k1_workaround_lpt_lp()
1051 ret_val = in e1000_k1_workaround_lpt_lp()
1056 if (ret_val) in e1000_k1_workaround_lpt_lp()
1064 ret_val = in e1000_k1_workaround_lpt_lp()
1079 ret_val = hw->phy.ops.read_reg(hw, I217_INBAND_CTRL, &reg); in e1000_k1_workaround_lpt_lp()
1080 if (ret_val) in e1000_k1_workaround_lpt_lp()
1081 return ret_val; in e1000_k1_workaround_lpt_lp()
1101 ret_val = hw->phy.ops.write_reg(hw, I217_INBAND_CTRL, reg); in e1000_k1_workaround_lpt_lp()
1102 if (ret_val) in e1000_k1_workaround_lpt_lp()
1103 return ret_val; in e1000_k1_workaround_lpt_lp()
1109 return ret_val; in e1000_k1_workaround_lpt_lp()
1287 s32 ret_val = E1000_SUCCESS; in e1000_enable_ulp_lpt_lp() local
1329 ret_val = hw->phy.ops.acquire(hw); in e1000_enable_ulp_lpt_lp()
1330 if (ret_val) in e1000_enable_ulp_lpt_lp()
1334 ret_val = e1000_read_phy_reg_hv_locked(hw, CV_SMB_CTRL, &phy_reg); in e1000_enable_ulp_lpt_lp()
1335 if (ret_val) in e1000_enable_ulp_lpt_lp()
1349 ret_val = e1000_read_phy_reg_hv_locked(hw, HV_OEM_BITS, in e1000_enable_ulp_lpt_lp()
1351 if (ret_val) in e1000_enable_ulp_lpt_lp()
1357 ret_val = e1000_write_phy_reg_hv_locked(hw, HV_OEM_BITS, in e1000_enable_ulp_lpt_lp()
1360 if (ret_val) in e1000_enable_ulp_lpt_lp()
1367 ret_val = e1000_read_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, &phy_reg); in e1000_enable_ulp_lpt_lp()
1368 if (ret_val) in e1000_enable_ulp_lpt_lp()
1398 ret_val = e1000_write_phy_reg_hv_locked(hw, HV_OEM_BITS, in e1000_enable_ulp_lpt_lp()
1400 if (ret_val) in e1000_enable_ulp_lpt_lp()
1407 if (ret_val) in e1000_enable_ulp_lpt_lp()
1408 DEBUGOUT1("Error in ULP enable flow: %d\n", ret_val); in e1000_enable_ulp_lpt_lp()
1412 return ret_val; in e1000_enable_ulp_lpt_lp()
1432 s32 ret_val = E1000_SUCCESS; in e1000_disable_ulp_lpt_lp() local
1458 ret_val = -E1000_ERR_PHY; in e1000_disable_ulp_lpt_lp()
1480 ret_val = hw->phy.ops.acquire(hw); in e1000_disable_ulp_lpt_lp()
1481 if (ret_val) in e1000_disable_ulp_lpt_lp()
1489 ret_val = e1000_read_phy_reg_hv_locked(hw, CV_SMB_CTRL, &phy_reg); in e1000_disable_ulp_lpt_lp()
1490 if (ret_val) { in e1000_disable_ulp_lpt_lp()
1500 ret_val = e1000_read_phy_reg_hv_locked(hw, CV_SMB_CTRL, in e1000_disable_ulp_lpt_lp()
1502 if (ret_val) in e1000_disable_ulp_lpt_lp()
1516 ret_val = e1000_read_phy_reg_hv_locked(hw, HV_PM_CTRL, &phy_reg); in e1000_disable_ulp_lpt_lp()
1517 if (ret_val) in e1000_disable_ulp_lpt_lp()
1523 ret_val = e1000_read_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, &phy_reg); in e1000_disable_ulp_lpt_lp()
1524 if (ret_val) in e1000_disable_ulp_lpt_lp()
1552 if (ret_val) in e1000_disable_ulp_lpt_lp()
1553 DEBUGOUT1("Error in ULP disable flow: %d\n", ret_val); in e1000_disable_ulp_lpt_lp()
1557 return ret_val; in e1000_disable_ulp_lpt_lp()
1571 s32 ret_val, tipg_reg = 0; in e1000_check_for_copper_link_ich8lan() local
1590 ret_val = e1000_phy_has_link_generic(hw, 1, 0, &link); in e1000_check_for_copper_link_ich8lan()
1591 if (ret_val) in e1000_check_for_copper_link_ich8lan()
1592 return ret_val; in e1000_check_for_copper_link_ich8lan()
1595 ret_val = e1000_k1_gig_workaround_hv(hw, link); in e1000_check_for_copper_link_ich8lan()
1596 if (ret_val) in e1000_check_for_copper_link_ich8lan()
1597 return ret_val; in e1000_check_for_copper_link_ich8lan()
1627 ret_val = hw->phy.ops.acquire(hw); in e1000_check_for_copper_link_ich8lan()
1628 if (ret_val) in e1000_check_for_copper_link_ich8lan()
1629 return ret_val; in e1000_check_for_copper_link_ich8lan()
1635 ret_val = e1000_write_emi_reg_locked(hw, emi_addr, emi_val); in e1000_check_for_copper_link_ich8lan()
1663 if (ret_val) in e1000_check_for_copper_link_ich8lan()
1664 return ret_val; in e1000_check_for_copper_link_ich8lan()
1671 ret_val = hw->phy.ops.acquire(hw); in e1000_check_for_copper_link_ich8lan()
1672 if (ret_val) in e1000_check_for_copper_link_ich8lan()
1673 return ret_val; in e1000_check_for_copper_link_ich8lan()
1675 ret_val = hw->phy.ops.read_reg_locked(hw, in e1000_check_for_copper_link_ich8lan()
1678 if (ret_val) { in e1000_check_for_copper_link_ich8lan()
1680 return ret_val; in e1000_check_for_copper_link_ich8lan()
1687 ret_val = in e1000_check_for_copper_link_ich8lan()
1692 if (ret_val) in e1000_check_for_copper_link_ich8lan()
1693 return ret_val; in e1000_check_for_copper_link_ich8lan()
1695 ret_val = hw->phy.ops.acquire(hw); in e1000_check_for_copper_link_ich8lan()
1696 if (ret_val) in e1000_check_for_copper_link_ich8lan()
1697 return ret_val; in e1000_check_for_copper_link_ich8lan()
1699 ret_val = hw->phy.ops.write_reg_locked(hw, in e1000_check_for_copper_link_ich8lan()
1703 if (ret_val) in e1000_check_for_copper_link_ich8lan()
1704 return ret_val; in e1000_check_for_copper_link_ich8lan()
1729 ret_val = e1000_k1_workaround_lpt_lp(hw, link); in e1000_check_for_copper_link_ich8lan()
1730 if (ret_val) in e1000_check_for_copper_link_ich8lan()
1731 return ret_val; in e1000_check_for_copper_link_ich8lan()
1738 ret_val = e1000_platform_pm_pch_lpt(hw, link); in e1000_check_for_copper_link_ich8lan()
1739 if (ret_val) in e1000_check_for_copper_link_ich8lan()
1740 return ret_val; in e1000_check_for_copper_link_ich8lan()
1767 ret_val = e1000_k1_workaround_lv(hw); in e1000_check_for_copper_link_ich8lan()
1768 if (ret_val) in e1000_check_for_copper_link_ich8lan()
1769 return ret_val; in e1000_check_for_copper_link_ich8lan()
1773 ret_val = e1000_link_stall_workaround_hv(hw); in e1000_check_for_copper_link_ich8lan()
1774 if (ret_val) in e1000_check_for_copper_link_ich8lan()
1775 return ret_val; in e1000_check_for_copper_link_ich8lan()
1803 ret_val = e1000_set_eee_pchlan(hw); in e1000_check_for_copper_link_ich8lan()
1804 if (ret_val) in e1000_check_for_copper_link_ich8lan()
1805 return ret_val; in e1000_check_for_copper_link_ich8lan()
1825 ret_val = e1000_config_fc_after_link_up_generic(hw); in e1000_check_for_copper_link_ich8lan()
1826 if (ret_val) in e1000_check_for_copper_link_ich8lan()
1829 return ret_val; in e1000_check_for_copper_link_ich8lan()
1910 s32 ret_val = E1000_SUCCESS; in e1000_acquire_swflag_ich8lan() local
1927 ret_val = -E1000_ERR_CONFIG; in e1000_acquire_swflag_ich8lan()
1950 ret_val = -E1000_ERR_CONFIG; in e1000_acquire_swflag_ich8lan()
1955 if (ret_val) in e1000_acquire_swflag_ich8lan()
1958 return ret_val; in e1000_acquire_swflag_ich8lan()
2071 s32 ret_val; in e1000_rar_set_pch2lan() local
2073 ret_val = e1000_acquire_swflag_ich8lan(hw); in e1000_rar_set_pch2lan()
2074 if (ret_val) in e1000_rar_set_pch2lan()
2149 s32 ret_val; in e1000_rar_set_pch_lpt() local
2151 ret_val = e1000_acquire_swflag_ich8lan(hw); in e1000_rar_set_pch_lpt()
2153 if (ret_val) in e1000_rar_set_pch_lpt()
2192 s32 ret_val; in e1000_update_mc_addr_list_pch2lan() local
2198 ret_val = hw->phy.ops.acquire(hw); in e1000_update_mc_addr_list_pch2lan()
2199 if (ret_val) in e1000_update_mc_addr_list_pch2lan()
2202 ret_val = e1000_enable_phy_wakeup_reg_access_bm(hw, &phy_reg); in e1000_update_mc_addr_list_pch2lan()
2203 if (ret_val) in e1000_update_mc_addr_list_pch2lan()
2262 s32 ret_val; in e1000_write_smbus_addr() local
2266 ret_val = e1000_read_phy_reg_hv_locked(hw, HV_SMB_ADDR, &phy_data); in e1000_write_smbus_addr()
2267 if (ret_val) in e1000_write_smbus_addr()
2268 return ret_val; in e1000_write_smbus_addr()
2301 s32 ret_val = E1000_SUCCESS; in e1000_sw_lcd_config_ich8lan() local
2315 return ret_val; in e1000_sw_lcd_config_ich8lan()
2339 return ret_val; in e1000_sw_lcd_config_ich8lan()
2342 ret_val = hw->phy.ops.acquire(hw); in e1000_sw_lcd_config_ich8lan()
2343 if (ret_val) in e1000_sw_lcd_config_ich8lan()
2344 return ret_val; in e1000_sw_lcd_config_ich8lan()
2375 ret_val = e1000_write_smbus_addr(hw); in e1000_sw_lcd_config_ich8lan()
2376 if (ret_val) in e1000_sw_lcd_config_ich8lan()
2380 ret_val = e1000_write_phy_reg_hv_locked(hw, HV_LED_CONFIG, in e1000_sw_lcd_config_ich8lan()
2382 if (ret_val) in e1000_sw_lcd_config_ich8lan()
2392 ret_val = hw->nvm.ops.read(hw, (word_addr + i * 2), 1, in e1000_sw_lcd_config_ich8lan()
2394 if (ret_val) in e1000_sw_lcd_config_ich8lan()
2397 ret_val = hw->nvm.ops.read(hw, (word_addr + i * 2 + 1), in e1000_sw_lcd_config_ich8lan()
2399 if (ret_val) in e1000_sw_lcd_config_ich8lan()
2411 ret_val = phy->ops.write_reg_locked(hw, (u32)reg_addr, in e1000_sw_lcd_config_ich8lan()
2413 if (ret_val) in e1000_sw_lcd_config_ich8lan()
2419 return ret_val; in e1000_sw_lcd_config_ich8lan()
2434 s32 ret_val = E1000_SUCCESS; in e1000_k1_gig_workaround_hv() local
2444 ret_val = hw->phy.ops.acquire(hw); in e1000_k1_gig_workaround_hv()
2445 if (ret_val) in e1000_k1_gig_workaround_hv()
2446 return ret_val; in e1000_k1_gig_workaround_hv()
2451 ret_val = hw->phy.ops.read_reg_locked(hw, BM_CS_STATUS, in e1000_k1_gig_workaround_hv()
2453 if (ret_val) in e1000_k1_gig_workaround_hv()
2467 ret_val = hw->phy.ops.read_reg_locked(hw, HV_M_STATUS, in e1000_k1_gig_workaround_hv()
2469 if (ret_val) in e1000_k1_gig_workaround_hv()
2483 ret_val = hw->phy.ops.write_reg_locked(hw, PHY_REG(770, 19), in e1000_k1_gig_workaround_hv()
2485 if (ret_val) in e1000_k1_gig_workaround_hv()
2490 ret_val = hw->phy.ops.write_reg_locked(hw, PHY_REG(770, 19), in e1000_k1_gig_workaround_hv()
2492 if (ret_val) in e1000_k1_gig_workaround_hv()
2496 ret_val = e1000_configure_k1_ich8lan(hw, k1_enable); in e1000_k1_gig_workaround_hv()
2501 return ret_val; in e1000_k1_gig_workaround_hv()
2516 s32 ret_val; in e1000_configure_k1_ich8lan() local
2524 ret_val = e1000_read_kmrn_reg_locked(hw, E1000_KMRNCTRLSTA_K1_CONFIG, in e1000_configure_k1_ich8lan()
2526 if (ret_val) in e1000_configure_k1_ich8lan()
2527 return ret_val; in e1000_configure_k1_ich8lan()
2534 ret_val = e1000_write_kmrn_reg_locked(hw, E1000_KMRNCTRLSTA_K1_CONFIG, in e1000_configure_k1_ich8lan()
2536 if (ret_val) in e1000_configure_k1_ich8lan()
2537 return ret_val; in e1000_configure_k1_ich8lan()
2569 s32 ret_val = 0; in e1000_oem_bits_config_ich8lan() local
2576 return ret_val; in e1000_oem_bits_config_ich8lan()
2578 ret_val = hw->phy.ops.acquire(hw); in e1000_oem_bits_config_ich8lan()
2579 if (ret_val) in e1000_oem_bits_config_ich8lan()
2580 return ret_val; in e1000_oem_bits_config_ich8lan()
2594 ret_val = hw->phy.ops.read_reg_locked(hw, HV_OEM_BITS, &oem_reg); in e1000_oem_bits_config_ich8lan()
2595 if (ret_val) in e1000_oem_bits_config_ich8lan()
2621 ret_val = hw->phy.ops.write_reg_locked(hw, HV_OEM_BITS, oem_reg); in e1000_oem_bits_config_ich8lan()
2626 return ret_val; in e1000_oem_bits_config_ich8lan()
2636 s32 ret_val; in e1000_set_mdio_slow_mode_hv() local
2641 ret_val = hw->phy.ops.read_reg(hw, HV_KMRN_MODE_CTRL, &data); in e1000_set_mdio_slow_mode_hv()
2642 if (ret_val) in e1000_set_mdio_slow_mode_hv()
2643 return ret_val; in e1000_set_mdio_slow_mode_hv()
2647 ret_val = hw->phy.ops.write_reg(hw, HV_KMRN_MODE_CTRL, data); in e1000_set_mdio_slow_mode_hv()
2649 return ret_val; in e1000_set_mdio_slow_mode_hv()
2658 s32 ret_val = E1000_SUCCESS; in e1000_hv_phy_workarounds_ich8lan() local
2668 ret_val = e1000_set_mdio_slow_mode_hv(hw); in e1000_hv_phy_workarounds_ich8lan()
2669 if (ret_val) in e1000_hv_phy_workarounds_ich8lan()
2670 return ret_val; in e1000_hv_phy_workarounds_ich8lan()
2677 ret_val = hw->phy.ops.write_reg(hw, PHY_REG(769, 25), 0x4431); in e1000_hv_phy_workarounds_ich8lan()
2678 if (ret_val) in e1000_hv_phy_workarounds_ich8lan()
2679 return ret_val; in e1000_hv_phy_workarounds_ich8lan()
2682 ret_val = hw->phy.ops.write_reg(hw, HV_KMRN_FIFO_CTRLSTA, in e1000_hv_phy_workarounds_ich8lan()
2684 if (ret_val) in e1000_hv_phy_workarounds_ich8lan()
2685 return ret_val; in e1000_hv_phy_workarounds_ich8lan()
2694 ret_val = hw->phy.ops.write_reg(hw, PHY_CONTROL, in e1000_hv_phy_workarounds_ich8lan()
2700 ret_val = hw->phy.ops.acquire(hw); in e1000_hv_phy_workarounds_ich8lan()
2701 if (ret_val) in e1000_hv_phy_workarounds_ich8lan()
2702 return ret_val; in e1000_hv_phy_workarounds_ich8lan()
2705 ret_val = e1000_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, 0); in e1000_hv_phy_workarounds_ich8lan()
2707 if (ret_val) in e1000_hv_phy_workarounds_ich8lan()
2708 return ret_val; in e1000_hv_phy_workarounds_ich8lan()
2713 ret_val = e1000_k1_gig_workaround_hv(hw, TRUE); in e1000_hv_phy_workarounds_ich8lan()
2714 if (ret_val) in e1000_hv_phy_workarounds_ich8lan()
2715 return ret_val; in e1000_hv_phy_workarounds_ich8lan()
2718 ret_val = hw->phy.ops.acquire(hw); in e1000_hv_phy_workarounds_ich8lan()
2719 if (ret_val) in e1000_hv_phy_workarounds_ich8lan()
2720 return ret_val; in e1000_hv_phy_workarounds_ich8lan()
2721 ret_val = hw->phy.ops.read_reg_locked(hw, BM_PORT_GEN_CFG, &phy_data); in e1000_hv_phy_workarounds_ich8lan()
2722 if (ret_val) in e1000_hv_phy_workarounds_ich8lan()
2724 ret_val = hw->phy.ops.write_reg_locked(hw, BM_PORT_GEN_CFG, in e1000_hv_phy_workarounds_ich8lan()
2726 if (ret_val) in e1000_hv_phy_workarounds_ich8lan()
2730 ret_val = e1000_write_emi_reg_locked(hw, I82577_MSE_THRESHOLD, 0x0034); in e1000_hv_phy_workarounds_ich8lan()
2734 return ret_val; in e1000_hv_phy_workarounds_ich8lan()
2745 s32 ret_val; in e1000_copy_rx_addrs_to_phy_ich8lan() local
2749 ret_val = hw->phy.ops.acquire(hw); in e1000_copy_rx_addrs_to_phy_ich8lan()
2750 if (ret_val) in e1000_copy_rx_addrs_to_phy_ich8lan()
2752 ret_val = e1000_enable_phy_wakeup_reg_access_bm(hw, &phy_reg); in e1000_copy_rx_addrs_to_phy_ich8lan()
2753 if (ret_val) in e1000_copy_rx_addrs_to_phy_ich8lan()
2804 s32 ret_val = E1000_SUCCESS; in e1000_lv_jumbo_workaround_ich8lan() local
2816 ret_val = hw->phy.ops.write_reg(hw, PHY_REG(769, 20), in e1000_lv_jumbo_workaround_ich8lan()
2818 if (ret_val) in e1000_lv_jumbo_workaround_ich8lan()
2819 return ret_val; in e1000_lv_jumbo_workaround_ich8lan()
2857 ret_val = e1000_read_kmrn_reg_generic(hw, in e1000_lv_jumbo_workaround_ich8lan()
2860 if (ret_val) in e1000_lv_jumbo_workaround_ich8lan()
2861 return ret_val; in e1000_lv_jumbo_workaround_ich8lan()
2862 ret_val = e1000_write_kmrn_reg_generic(hw, in e1000_lv_jumbo_workaround_ich8lan()
2865 if (ret_val) in e1000_lv_jumbo_workaround_ich8lan()
2866 return ret_val; in e1000_lv_jumbo_workaround_ich8lan()
2867 ret_val = e1000_read_kmrn_reg_generic(hw, in e1000_lv_jumbo_workaround_ich8lan()
2870 if (ret_val) in e1000_lv_jumbo_workaround_ich8lan()
2871 return ret_val; in e1000_lv_jumbo_workaround_ich8lan()
2874 ret_val = e1000_write_kmrn_reg_generic(hw, in e1000_lv_jumbo_workaround_ich8lan()
2877 if (ret_val) in e1000_lv_jumbo_workaround_ich8lan()
2878 return ret_val; in e1000_lv_jumbo_workaround_ich8lan()
2884 ret_val = hw->phy.ops.write_reg(hw, PHY_REG(769, 23), data); in e1000_lv_jumbo_workaround_ich8lan()
2885 if (ret_val) in e1000_lv_jumbo_workaround_ich8lan()
2886 return ret_val; in e1000_lv_jumbo_workaround_ich8lan()
2889 ret_val = hw->phy.ops.write_reg(hw, PHY_REG(769, 16), data); in e1000_lv_jumbo_workaround_ich8lan()
2890 if (ret_val) in e1000_lv_jumbo_workaround_ich8lan()
2891 return ret_val; in e1000_lv_jumbo_workaround_ich8lan()
2895 ret_val = hw->phy.ops.write_reg(hw, PHY_REG(776, 20), data); in e1000_lv_jumbo_workaround_ich8lan()
2896 if (ret_val) in e1000_lv_jumbo_workaround_ich8lan()
2897 return ret_val; in e1000_lv_jumbo_workaround_ich8lan()
2898 ret_val = hw->phy.ops.write_reg(hw, PHY_REG(776, 23), 0xF100); in e1000_lv_jumbo_workaround_ich8lan()
2899 if (ret_val) in e1000_lv_jumbo_workaround_ich8lan()
2900 return ret_val; in e1000_lv_jumbo_workaround_ich8lan()
2902 ret_val = hw->phy.ops.write_reg(hw, HV_PM_CTRL, data | in e1000_lv_jumbo_workaround_ich8lan()
2904 if (ret_val) in e1000_lv_jumbo_workaround_ich8lan()
2905 return ret_val; in e1000_lv_jumbo_workaround_ich8lan()
2916 ret_val = e1000_read_kmrn_reg_generic(hw, in e1000_lv_jumbo_workaround_ich8lan()
2919 if (ret_val) in e1000_lv_jumbo_workaround_ich8lan()
2920 return ret_val; in e1000_lv_jumbo_workaround_ich8lan()
2921 ret_val = e1000_write_kmrn_reg_generic(hw, in e1000_lv_jumbo_workaround_ich8lan()
2924 if (ret_val) in e1000_lv_jumbo_workaround_ich8lan()
2925 return ret_val; in e1000_lv_jumbo_workaround_ich8lan()
2926 ret_val = e1000_read_kmrn_reg_generic(hw, in e1000_lv_jumbo_workaround_ich8lan()
2929 if (ret_val) in e1000_lv_jumbo_workaround_ich8lan()
2930 return ret_val; in e1000_lv_jumbo_workaround_ich8lan()
2933 ret_val = e1000_write_kmrn_reg_generic(hw, in e1000_lv_jumbo_workaround_ich8lan()
2936 if (ret_val) in e1000_lv_jumbo_workaround_ich8lan()
2937 return ret_val; in e1000_lv_jumbo_workaround_ich8lan()
2942 ret_val = hw->phy.ops.write_reg(hw, PHY_REG(769, 23), data); in e1000_lv_jumbo_workaround_ich8lan()
2943 if (ret_val) in e1000_lv_jumbo_workaround_ich8lan()
2944 return ret_val; in e1000_lv_jumbo_workaround_ich8lan()
2947 ret_val = hw->phy.ops.write_reg(hw, PHY_REG(769, 16), data); in e1000_lv_jumbo_workaround_ich8lan()
2948 if (ret_val) in e1000_lv_jumbo_workaround_ich8lan()
2949 return ret_val; in e1000_lv_jumbo_workaround_ich8lan()
2953 ret_val = hw->phy.ops.write_reg(hw, PHY_REG(776, 20), data); in e1000_lv_jumbo_workaround_ich8lan()
2954 if (ret_val) in e1000_lv_jumbo_workaround_ich8lan()
2955 return ret_val; in e1000_lv_jumbo_workaround_ich8lan()
2956 ret_val = hw->phy.ops.write_reg(hw, PHY_REG(776, 23), 0x7E00); in e1000_lv_jumbo_workaround_ich8lan()
2957 if (ret_val) in e1000_lv_jumbo_workaround_ich8lan()
2958 return ret_val; in e1000_lv_jumbo_workaround_ich8lan()
2960 ret_val = hw->phy.ops.write_reg(hw, HV_PM_CTRL, data & in e1000_lv_jumbo_workaround_ich8lan()
2962 if (ret_val) in e1000_lv_jumbo_workaround_ich8lan()
2963 return ret_val; in e1000_lv_jumbo_workaround_ich8lan()
2977 s32 ret_val = E1000_SUCCESS; in e1000_lv_phy_workarounds_ich8lan() local
2985 ret_val = e1000_set_mdio_slow_mode_hv(hw); in e1000_lv_phy_workarounds_ich8lan()
2986 if (ret_val) in e1000_lv_phy_workarounds_ich8lan()
2987 return ret_val; in e1000_lv_phy_workarounds_ich8lan()
2989 ret_val = hw->phy.ops.acquire(hw); in e1000_lv_phy_workarounds_ich8lan()
2990 if (ret_val) in e1000_lv_phy_workarounds_ich8lan()
2991 return ret_val; in e1000_lv_phy_workarounds_ich8lan()
2993 ret_val = e1000_write_emi_reg_locked(hw, I82579_MSE_THRESHOLD, 0x0034); in e1000_lv_phy_workarounds_ich8lan()
2994 if (ret_val) in e1000_lv_phy_workarounds_ich8lan()
2997 ret_val = e1000_write_emi_reg_locked(hw, I82579_MSE_LINK_DOWN, 0x0005); in e1000_lv_phy_workarounds_ich8lan()
3001 return ret_val; in e1000_lv_phy_workarounds_ich8lan()
3013 s32 ret_val = E1000_SUCCESS; in e1000_k1_workaround_lv() local
3022 ret_val = hw->phy.ops.read_reg(hw, HV_M_STATUS, &status_reg); in e1000_k1_workaround_lv()
3023 if (ret_val) in e1000_k1_workaround_lv()
3024 return ret_val; in e1000_k1_workaround_lv()
3033 ret_val = hw->phy.ops.read_reg(hw, HV_PM_CTRL, in e1000_k1_workaround_lv()
3035 if (ret_val) in e1000_k1_workaround_lv()
3036 return ret_val; in e1000_k1_workaround_lv()
3038 ret_val = hw->phy.ops.write_reg(hw, HV_PM_CTRL, in e1000_k1_workaround_lv()
3040 if (ret_val) in e1000_k1_workaround_lv()
3041 return ret_val; in e1000_k1_workaround_lv()
3051 return ret_val; in e1000_k1_workaround_lv()
3120 s32 ret_val = E1000_SUCCESS; in e1000_post_phy_reset_ich8lan() local
3134 ret_val = e1000_hv_phy_workarounds_ich8lan(hw); in e1000_post_phy_reset_ich8lan()
3135 if (ret_val) in e1000_post_phy_reset_ich8lan()
3136 return ret_val; in e1000_post_phy_reset_ich8lan()
3139 ret_val = e1000_lv_phy_workarounds_ich8lan(hw); in e1000_post_phy_reset_ich8lan()
3140 if (ret_val) in e1000_post_phy_reset_ich8lan()
3141 return ret_val; in e1000_post_phy_reset_ich8lan()
3155 ret_val = e1000_sw_lcd_config_ich8lan(hw); in e1000_post_phy_reset_ich8lan()
3156 if (ret_val) in e1000_post_phy_reset_ich8lan()
3157 return ret_val; in e1000_post_phy_reset_ich8lan()
3160 ret_val = e1000_oem_bits_config_ich8lan(hw, TRUE); in e1000_post_phy_reset_ich8lan()
3171 ret_val = hw->phy.ops.acquire(hw); in e1000_post_phy_reset_ich8lan()
3172 if (ret_val) in e1000_post_phy_reset_ich8lan()
3173 return ret_val; in e1000_post_phy_reset_ich8lan()
3174 ret_val = e1000_write_emi_reg_locked(hw, in e1000_post_phy_reset_ich8lan()
3180 return ret_val; in e1000_post_phy_reset_ich8lan()
3193 s32 ret_val = E1000_SUCCESS; in e1000_phy_hw_reset_ich8lan() local
3202 ret_val = e1000_phy_hw_reset_generic(hw); in e1000_phy_hw_reset_ich8lan()
3203 if (ret_val) in e1000_phy_hw_reset_ich8lan()
3204 return ret_val; in e1000_phy_hw_reset_ich8lan()
3222 s32 ret_val; in e1000_set_lplu_state_pchlan() local
3226 ret_val = hw->phy.ops.read_reg(hw, HV_OEM_BITS, &oem_reg); in e1000_set_lplu_state_pchlan()
3227 if (ret_val) in e1000_set_lplu_state_pchlan()
3228 return ret_val; in e1000_set_lplu_state_pchlan()
3258 s32 ret_val = E1000_SUCCESS; in e1000_set_d0_lplu_state_ich8lan() local
3282 ret_val = phy->ops.read_reg(hw, in e1000_set_d0_lplu_state_ich8lan()
3285 if (ret_val) in e1000_set_d0_lplu_state_ich8lan()
3286 return ret_val; in e1000_set_d0_lplu_state_ich8lan()
3288 ret_val = phy->ops.write_reg(hw, in e1000_set_d0_lplu_state_ich8lan()
3291 if (ret_val) in e1000_set_d0_lplu_state_ich8lan()
3292 return ret_val; in e1000_set_d0_lplu_state_ich8lan()
3306 ret_val = phy->ops.read_reg(hw, in e1000_set_d0_lplu_state_ich8lan()
3309 if (ret_val) in e1000_set_d0_lplu_state_ich8lan()
3310 return ret_val; in e1000_set_d0_lplu_state_ich8lan()
3313 ret_val = phy->ops.write_reg(hw, in e1000_set_d0_lplu_state_ich8lan()
3316 if (ret_val) in e1000_set_d0_lplu_state_ich8lan()
3317 return ret_val; in e1000_set_d0_lplu_state_ich8lan()
3319 ret_val = phy->ops.read_reg(hw, in e1000_set_d0_lplu_state_ich8lan()
3322 if (ret_val) in e1000_set_d0_lplu_state_ich8lan()
3323 return ret_val; in e1000_set_d0_lplu_state_ich8lan()
3326 ret_val = phy->ops.write_reg(hw, in e1000_set_d0_lplu_state_ich8lan()
3329 if (ret_val) in e1000_set_d0_lplu_state_ich8lan()
3330 return ret_val; in e1000_set_d0_lplu_state_ich8lan()
3354 s32 ret_val = E1000_SUCCESS; in e1000_set_d3_lplu_state_ich8lan() local
3374 ret_val = phy->ops.read_reg(hw, in e1000_set_d3_lplu_state_ich8lan()
3377 if (ret_val) in e1000_set_d3_lplu_state_ich8lan()
3378 return ret_val; in e1000_set_d3_lplu_state_ich8lan()
3381 ret_val = phy->ops.write_reg(hw, in e1000_set_d3_lplu_state_ich8lan()
3384 if (ret_val) in e1000_set_d3_lplu_state_ich8lan()
3385 return ret_val; in e1000_set_d3_lplu_state_ich8lan()
3387 ret_val = phy->ops.read_reg(hw, in e1000_set_d3_lplu_state_ich8lan()
3390 if (ret_val) in e1000_set_d3_lplu_state_ich8lan()
3391 return ret_val; in e1000_set_d3_lplu_state_ich8lan()
3394 ret_val = phy->ops.write_reg(hw, in e1000_set_d3_lplu_state_ich8lan()
3397 if (ret_val) in e1000_set_d3_lplu_state_ich8lan()
3398 return ret_val; in e1000_set_d3_lplu_state_ich8lan()
3416 ret_val = phy->ops.read_reg(hw, in e1000_set_d3_lplu_state_ich8lan()
3419 if (ret_val) in e1000_set_d3_lplu_state_ich8lan()
3420 return ret_val; in e1000_set_d3_lplu_state_ich8lan()
3423 ret_val = phy->ops.write_reg(hw, in e1000_set_d3_lplu_state_ich8lan()
3428 return ret_val; in e1000_set_d3_lplu_state_ich8lan()
3447 s32 ret_val; in e1000_valid_nvm_bank_detect_ich8lan() local
3469 ret_val = e1000_read_flash_dword_ich8lan(hw, act_offset, in e1000_valid_nvm_bank_detect_ich8lan()
3471 if (ret_val) in e1000_valid_nvm_bank_detect_ich8lan()
3472 return ret_val; in e1000_valid_nvm_bank_detect_ich8lan()
3481 ret_val = e1000_read_flash_dword_ich8lan(hw, act_offset + in e1000_valid_nvm_bank_detect_ich8lan()
3484 if (ret_val) in e1000_valid_nvm_bank_detect_ich8lan()
3485 return ret_val; in e1000_valid_nvm_bank_detect_ich8lan()
3514 ret_val = e1000_read_flash_byte_ich8lan(hw, act_offset, in e1000_valid_nvm_bank_detect_ich8lan()
3516 if (ret_val) in e1000_valid_nvm_bank_detect_ich8lan()
3517 return ret_val; in e1000_valid_nvm_bank_detect_ich8lan()
3525 ret_val = e1000_read_flash_byte_ich8lan(hw, act_offset + in e1000_valid_nvm_bank_detect_ich8lan()
3528 if (ret_val) in e1000_valid_nvm_bank_detect_ich8lan()
3529 return ret_val; in e1000_valid_nvm_bank_detect_ich8lan()
3556 s32 ret_val = E1000_SUCCESS; in e1000_read_nvm_spt() local
3567 ret_val = -E1000_ERR_NVM; in e1000_read_nvm_spt()
3573 ret_val = e1000_valid_nvm_bank_detect_ich8lan(hw, &bank); in e1000_read_nvm_spt()
3574 if (ret_val != E1000_SUCCESS) { in e1000_read_nvm_spt()
3582 ret_val = E1000_SUCCESS; in e1000_read_nvm_spt()
3591 ret_val = in e1000_read_nvm_spt()
3595 if (ret_val) in e1000_read_nvm_spt()
3606 ret_val = in e1000_read_nvm_spt()
3610 if (ret_val) in e1000_read_nvm_spt()
3628 if (ret_val) in e1000_read_nvm_spt()
3629 DEBUGOUT1("NVM read error: %d\n", ret_val); in e1000_read_nvm_spt()
3631 return ret_val; in e1000_read_nvm_spt()
3649 s32 ret_val = E1000_SUCCESS; in e1000_read_nvm_ich8lan() local
3658 ret_val = -E1000_ERR_NVM; in e1000_read_nvm_ich8lan()
3664 ret_val = e1000_valid_nvm_bank_detect_ich8lan(hw, &bank); in e1000_read_nvm_ich8lan()
3665 if (ret_val != E1000_SUCCESS) { in e1000_read_nvm_ich8lan()
3673 ret_val = E1000_SUCCESS; in e1000_read_nvm_ich8lan()
3678 ret_val = e1000_read_flash_word_ich8lan(hw, in e1000_read_nvm_ich8lan()
3681 if (ret_val) in e1000_read_nvm_ich8lan()
3690 if (ret_val) in e1000_read_nvm_ich8lan()
3691 DEBUGOUT1("NVM read error: %d\n", ret_val); in e1000_read_nvm_ich8lan()
3693 return ret_val; in e1000_read_nvm_ich8lan()
3706 s32 ret_val = -E1000_ERR_NVM; in e1000_flash_cycle_init_ich8lan() local
3747 ret_val = E1000_SUCCESS; in e1000_flash_cycle_init_ich8lan()
3758 ret_val = E1000_SUCCESS; in e1000_flash_cycle_init_ich8lan()
3763 if (ret_val == E1000_SUCCESS) { in e1000_flash_cycle_init_ich8lan()
3779 return ret_val; in e1000_flash_cycle_init_ich8lan()
3881 s32 ret_val; in e1000_read_flash_byte_ich8lan() local
3890 ret_val = e1000_read_flash_data_ich8lan(hw, offset, 1, &word); in e1000_read_flash_byte_ich8lan()
3892 if (ret_val) in e1000_read_flash_byte_ich8lan()
3893 return ret_val; in e1000_read_flash_byte_ich8lan()
3916 s32 ret_val = -E1000_ERR_NVM; in e1000_read_flash_data_ich8lan() local
3929 ret_val = e1000_flash_cycle_init_ich8lan(hw); in e1000_read_flash_data_ich8lan()
3930 if (ret_val != E1000_SUCCESS) in e1000_read_flash_data_ich8lan()
3940 ret_val = e1000_flash_cycle_ich8lan(hw, in e1000_read_flash_data_ich8lan()
3948 if (ret_val == E1000_SUCCESS) { in e1000_read_flash_data_ich8lan()
3973 return ret_val; in e1000_read_flash_data_ich8lan()
3990 s32 ret_val = -E1000_ERR_NVM; in e1000_read_flash_data32_ich8lan() local
4003 ret_val = e1000_flash_cycle_init_ich8lan(hw); in e1000_read_flash_data32_ich8lan()
4004 if (ret_val != E1000_SUCCESS) in e1000_read_flash_data32_ich8lan()
4021 ret_val = e1000_flash_cycle_ich8lan(hw, in e1000_read_flash_data32_ich8lan()
4029 if (ret_val == E1000_SUCCESS) { in e1000_read_flash_data32_ich8lan()
4050 return ret_val; in e1000_read_flash_data32_ich8lan()
4105 s32 ret_val; in e1000_update_nvm_checksum_spt() local
4110 ret_val = e1000_update_nvm_checksum_generic(hw); in e1000_update_nvm_checksum_spt()
4111 if (ret_val) in e1000_update_nvm_checksum_spt()
4123 ret_val = e1000_valid_nvm_bank_detect_ich8lan(hw, &bank); in e1000_update_nvm_checksum_spt()
4124 if (ret_val != E1000_SUCCESS) { in e1000_update_nvm_checksum_spt()
4132 ret_val = e1000_erase_flash_bank_ich8lan(hw, 1); in e1000_update_nvm_checksum_spt()
4133 if (ret_val) in e1000_update_nvm_checksum_spt()
4138 ret_val = e1000_erase_flash_bank_ich8lan(hw, 0); in e1000_update_nvm_checksum_spt()
4139 if (ret_val) in e1000_update_nvm_checksum_spt()
4147 ret_val = e1000_read_flash_dword_ich8lan(hw, in e1000_update_nvm_checksum_spt()
4160 if (ret_val) in e1000_update_nvm_checksum_spt()
4180 ret_val = e1000_retry_write_flash_dword_ich8lan(hw, act_offset, in e1000_update_nvm_checksum_spt()
4182 if (ret_val) in e1000_update_nvm_checksum_spt()
4189 if (ret_val) { in e1000_update_nvm_checksum_spt()
4203 ret_val = e1000_read_flash_dword_ich8lan(hw, act_offset, &dword); in e1000_update_nvm_checksum_spt()
4205 if (ret_val) in e1000_update_nvm_checksum_spt()
4209 ret_val = e1000_retry_write_flash_dword_ich8lan(hw, act_offset, dword); in e1000_update_nvm_checksum_spt()
4211 if (ret_val) in e1000_update_nvm_checksum_spt()
4223 ret_val = e1000_read_flash_dword_ich8lan(hw, act_offset, &dword); in e1000_update_nvm_checksum_spt()
4225 if (ret_val) in e1000_update_nvm_checksum_spt()
4229 ret_val = e1000_retry_write_flash_dword_ich8lan(hw, act_offset, dword); in e1000_update_nvm_checksum_spt()
4231 if (ret_val) in e1000_update_nvm_checksum_spt()
4246 if (!ret_val) { in e1000_update_nvm_checksum_spt()
4252 if (ret_val) in e1000_update_nvm_checksum_spt()
4253 DEBUGOUT1("NVM update error: %d\n", ret_val); in e1000_update_nvm_checksum_spt()
4255 return ret_val; in e1000_update_nvm_checksum_spt()
4274 s32 ret_val; in e1000_update_nvm_checksum_ich8lan() local
4279 ret_val = e1000_update_nvm_checksum_generic(hw); in e1000_update_nvm_checksum_ich8lan()
4280 if (ret_val) in e1000_update_nvm_checksum_ich8lan()
4292 ret_val = e1000_valid_nvm_bank_detect_ich8lan(hw, &bank); in e1000_update_nvm_checksum_ich8lan()
4293 if (ret_val != E1000_SUCCESS) { in e1000_update_nvm_checksum_ich8lan()
4301 ret_val = e1000_erase_flash_bank_ich8lan(hw, 1); in e1000_update_nvm_checksum_ich8lan()
4302 if (ret_val) in e1000_update_nvm_checksum_ich8lan()
4307 ret_val = e1000_erase_flash_bank_ich8lan(hw, 0); in e1000_update_nvm_checksum_ich8lan()
4308 if (ret_val) in e1000_update_nvm_checksum_ich8lan()
4315 ret_val = e1000_read_flash_word_ich8lan(hw, i + in e1000_update_nvm_checksum_ich8lan()
4318 if (ret_val) in e1000_update_nvm_checksum_ich8lan()
4337 ret_val = e1000_retry_write_flash_byte_ich8lan(hw, in e1000_update_nvm_checksum_ich8lan()
4340 if (ret_val) in e1000_update_nvm_checksum_ich8lan()
4344 ret_val = e1000_retry_write_flash_byte_ich8lan(hw, in e1000_update_nvm_checksum_ich8lan()
4347 if (ret_val) in e1000_update_nvm_checksum_ich8lan()
4354 if (ret_val) { in e1000_update_nvm_checksum_ich8lan()
4365 ret_val = e1000_read_flash_word_ich8lan(hw, act_offset, &data); in e1000_update_nvm_checksum_ich8lan()
4366 if (ret_val) in e1000_update_nvm_checksum_ich8lan()
4370 ret_val = e1000_retry_write_flash_byte_ich8lan(hw, act_offset * 2 + 1, in e1000_update_nvm_checksum_ich8lan()
4372 if (ret_val) in e1000_update_nvm_checksum_ich8lan()
4382 ret_val = e1000_retry_write_flash_byte_ich8lan(hw, act_offset, 0); in e1000_update_nvm_checksum_ich8lan()
4384 if (ret_val) in e1000_update_nvm_checksum_ich8lan()
4399 if (!ret_val) { in e1000_update_nvm_checksum_ich8lan()
4405 if (ret_val) in e1000_update_nvm_checksum_ich8lan()
4406 DEBUGOUT1("NVM update error: %d\n", ret_val); in e1000_update_nvm_checksum_ich8lan()
4408 return ret_val; in e1000_update_nvm_checksum_ich8lan()
4421 s32 ret_val; in e1000_validate_nvm_checksum_ich8lan() local
4454 ret_val = hw->nvm.ops.read(hw, word, 1, &data); in e1000_validate_nvm_checksum_ich8lan()
4455 if (ret_val) in e1000_validate_nvm_checksum_ich8lan()
4456 return ret_val; in e1000_validate_nvm_checksum_ich8lan()
4460 ret_val = hw->nvm.ops.write(hw, word, 1, &data); in e1000_validate_nvm_checksum_ich8lan()
4461 if (ret_val) in e1000_validate_nvm_checksum_ich8lan()
4462 return ret_val; in e1000_validate_nvm_checksum_ich8lan()
4463 ret_val = hw->nvm.ops.update(hw); in e1000_validate_nvm_checksum_ich8lan()
4464 if (ret_val) in e1000_validate_nvm_checksum_ich8lan()
4465 return ret_val; in e1000_validate_nvm_checksum_ich8lan()
4487 s32 ret_val; in e1000_write_flash_data_ich8lan() local
4506 ret_val = e1000_flash_cycle_init_ich8lan(hw); in e1000_write_flash_data_ich8lan()
4507 if (ret_val != E1000_SUCCESS) in e1000_write_flash_data_ich8lan()
4545 ret_val = in e1000_write_flash_data_ich8lan()
4548 if (ret_val == E1000_SUCCESS) in e1000_write_flash_data_ich8lan()
4566 return ret_val; in e1000_write_flash_data_ich8lan()
4583 s32 ret_val; in e1000_write_flash_data32_ich8lan() local
4597 ret_val = e1000_flash_cycle_init_ich8lan(hw); in e1000_write_flash_data32_ich8lan()
4598 if (ret_val != E1000_SUCCESS) in e1000_write_flash_data32_ich8lan()
4633 ret_val = e1000_flash_cycle_ich8lan(hw, in e1000_write_flash_data32_ich8lan()
4636 if (ret_val == E1000_SUCCESS) in e1000_write_flash_data32_ich8lan()
4655 return ret_val; in e1000_write_flash_data32_ich8lan()
4688 s32 ret_val; in e1000_retry_write_flash_dword_ich8lan() local
4696 ret_val = e1000_write_flash_data32_ich8lan(hw, offset, dword); in e1000_retry_write_flash_dword_ich8lan()
4698 if (!ret_val) in e1000_retry_write_flash_dword_ich8lan()
4699 return ret_val; in e1000_retry_write_flash_dword_ich8lan()
4703 ret_val = e1000_write_flash_data32_ich8lan(hw, offset, dword); in e1000_retry_write_flash_dword_ich8lan()
4704 if (ret_val == E1000_SUCCESS) in e1000_retry_write_flash_dword_ich8lan()
4725 s32 ret_val; in e1000_retry_write_flash_byte_ich8lan() local
4730 ret_val = e1000_write_flash_byte_ich8lan(hw, offset, byte); in e1000_retry_write_flash_byte_ich8lan()
4731 if (!ret_val) in e1000_retry_write_flash_byte_ich8lan()
4732 return ret_val; in e1000_retry_write_flash_byte_ich8lan()
4737 ret_val = e1000_write_flash_byte_ich8lan(hw, offset, byte); in e1000_retry_write_flash_byte_ich8lan()
4738 if (ret_val == E1000_SUCCESS) in e1000_retry_write_flash_byte_ich8lan()
4763 s32 ret_val; in e1000_erase_flash_bank_ich8lan() local
4814 ret_val = e1000_flash_cycle_init_ich8lan(hw); in e1000_erase_flash_bank_ich8lan()
4815 if (ret_val) in e1000_erase_flash_bank_ich8lan()
4816 return ret_val; in e1000_erase_flash_bank_ich8lan()
4846 ret_val = e1000_flash_cycle_ich8lan(hw, timeout); in e1000_erase_flash_bank_ich8lan()
4847 if (ret_val == E1000_SUCCESS) in e1000_erase_flash_bank_ich8lan()
4860 return ret_val; in e1000_erase_flash_bank_ich8lan()
4878 s32 ret_val; in e1000_valid_led_default_ich8lan() local
4882 ret_val = hw->nvm.ops.read(hw, NVM_ID_LED_SETTINGS, 1, data); in e1000_valid_led_default_ich8lan()
4883 if (ret_val) { in e1000_valid_led_default_ich8lan()
4885 return ret_val; in e1000_valid_led_default_ich8lan()
4910 s32 ret_val; in e1000_id_led_init_pchlan() local
4918 ret_val = hw->nvm.ops.valid_led_default(hw, &data); in e1000_id_led_init_pchlan()
4919 if (ret_val) in e1000_id_led_init_pchlan()
4920 return ret_val; in e1000_id_led_init_pchlan()
4978 s32 ret_val; in e1000_get_bus_info_ich8lan() local
4982 ret_val = e1000_get_bus_info_pcie_generic(hw); in e1000_get_bus_info_ich8lan()
4992 return ret_val; in e1000_get_bus_info_ich8lan()
5007 s32 ret_val; in e1000_reset_hw_ich8lan() local
5014 ret_val = e1000_disable_pcie_master_generic(hw); in e1000_reset_hw_ich8lan()
5015 if (ret_val) in e1000_reset_hw_ich8lan()
5041 ret_val = e1000_read_nvm(hw, E1000_NVM_K1_CONFIG, 1, &kum_cfg); in e1000_reset_hw_ich8lan()
5042 if (ret_val) in e1000_reset_hw_ich8lan()
5043 return ret_val; in e1000_reset_hw_ich8lan()
5067 ret_val = e1000_acquire_swflag_ich8lan(hw); in e1000_reset_hw_ich8lan()
5081 if (!ret_val) in e1000_reset_hw_ich8lan()
5085 ret_val = hw->phy.ops.get_cfg_done(hw); in e1000_reset_hw_ich8lan()
5086 if (ret_val) in e1000_reset_hw_ich8lan()
5087 return ret_val; in e1000_reset_hw_ich8lan()
5089 ret_val = e1000_post_phy_reset_ich8lan(hw); in e1000_reset_hw_ich8lan()
5090 if (ret_val) in e1000_reset_hw_ich8lan()
5091 return ret_val; in e1000_reset_hw_ich8lan()
5127 s32 ret_val; in e1000_init_hw_ich8lan() local
5135 ret_val = mac->ops.id_led_init(hw); in e1000_init_hw_ich8lan()
5137 if (ret_val) in e1000_init_hw_ich8lan()
5156 ret_val = e1000_phy_hw_reset_ich8lan(hw); in e1000_init_hw_ich8lan()
5157 if (ret_val) in e1000_init_hw_ich8lan()
5158 return ret_val; in e1000_init_hw_ich8lan()
5162 ret_val = mac->ops.setup_link(hw); in e1000_init_hw_ich8lan()
5198 return ret_val; in e1000_init_hw_ich8lan()
5294 s32 ret_val; in e1000_setup_link_ich8lan() local
5317 ret_val = hw->mac.ops.setup_physical_interface(hw); in e1000_setup_link_ich8lan()
5318 if (ret_val) in e1000_setup_link_ich8lan()
5319 return ret_val; in e1000_setup_link_ich8lan()
5328 ret_val = hw->phy.ops.write_reg(hw, in e1000_setup_link_ich8lan()
5331 if (ret_val) in e1000_setup_link_ich8lan()
5332 return ret_val; in e1000_setup_link_ich8lan()
5349 s32 ret_val; in e1000_setup_copper_link_ich8lan() local
5363 ret_val = e1000_write_kmrn_reg_generic(hw, E1000_KMRNCTRLSTA_TIMEOUTS, in e1000_setup_copper_link_ich8lan()
5365 if (ret_val) in e1000_setup_copper_link_ich8lan()
5366 return ret_val; in e1000_setup_copper_link_ich8lan()
5367 ret_val = e1000_read_kmrn_reg_generic(hw, in e1000_setup_copper_link_ich8lan()
5370 if (ret_val) in e1000_setup_copper_link_ich8lan()
5371 return ret_val; in e1000_setup_copper_link_ich8lan()
5373 ret_val = e1000_write_kmrn_reg_generic(hw, in e1000_setup_copper_link_ich8lan()
5376 if (ret_val) in e1000_setup_copper_link_ich8lan()
5377 return ret_val; in e1000_setup_copper_link_ich8lan()
5381 ret_val = e1000_copper_link_setup_igp(hw); in e1000_setup_copper_link_ich8lan()
5382 if (ret_val) in e1000_setup_copper_link_ich8lan()
5383 return ret_val; in e1000_setup_copper_link_ich8lan()
5387 ret_val = e1000_copper_link_setup_m88(hw); in e1000_setup_copper_link_ich8lan()
5388 if (ret_val) in e1000_setup_copper_link_ich8lan()
5389 return ret_val; in e1000_setup_copper_link_ich8lan()
5393 ret_val = e1000_copper_link_setup_82577(hw); in e1000_setup_copper_link_ich8lan()
5394 if (ret_val) in e1000_setup_copper_link_ich8lan()
5395 return ret_val; in e1000_setup_copper_link_ich8lan()
5398 ret_val = hw->phy.ops.read_reg(hw, IFE_PHY_MDIX_CONTROL, in e1000_setup_copper_link_ich8lan()
5400 if (ret_val) in e1000_setup_copper_link_ich8lan()
5401 return ret_val; in e1000_setup_copper_link_ich8lan()
5417 ret_val = hw->phy.ops.write_reg(hw, IFE_PHY_MDIX_CONTROL, in e1000_setup_copper_link_ich8lan()
5419 if (ret_val) in e1000_setup_copper_link_ich8lan()
5420 return ret_val; in e1000_setup_copper_link_ich8lan()
5440 s32 ret_val; in e1000_setup_copper_link_pch_lpt() local
5449 ret_val = e1000_copper_link_setup_82577(hw); in e1000_setup_copper_link_pch_lpt()
5450 if (ret_val) in e1000_setup_copper_link_pch_lpt()
5451 return ret_val; in e1000_setup_copper_link_pch_lpt()
5469 s32 ret_val; in e1000_get_link_up_info_ich8lan() local
5473 ret_val = e1000_get_speed_and_duplex_copper_generic(hw, speed, duplex); in e1000_get_link_up_info_ich8lan()
5474 if (ret_val) in e1000_get_link_up_info_ich8lan()
5475 return ret_val; in e1000_get_link_up_info_ich8lan()
5480 ret_val = e1000_kmrn_lock_loss_workaround_ich8lan(hw); in e1000_get_link_up_info_ich8lan()
5483 return ret_val; in e1000_get_link_up_info_ich8lan()
5505 s32 ret_val; in e1000_kmrn_lock_loss_workaround_ich8lan() local
5518 ret_val = e1000_phy_has_link_generic(hw, 1, 0, &link); in e1000_kmrn_lock_loss_workaround_ich8lan()
5524 ret_val = hw->phy.ops.read_reg(hw, IGP3_KMRN_DIAG, &data); in e1000_kmrn_lock_loss_workaround_ich8lan()
5525 if (ret_val) in e1000_kmrn_lock_loss_workaround_ich8lan()
5526 return ret_val; in e1000_kmrn_lock_loss_workaround_ich8lan()
5528 ret_val = hw->phy.ops.read_reg(hw, IGP3_KMRN_DIAG, &data); in e1000_kmrn_lock_loss_workaround_ich8lan()
5529 if (ret_val) in e1000_kmrn_lock_loss_workaround_ich8lan()
5530 return ret_val; in e1000_kmrn_lock_loss_workaround_ich8lan()
5646 s32 ret_val; in e1000_gig_downshift_workaround_ich8lan() local
5655 ret_val = e1000_read_kmrn_reg_generic(hw, E1000_KMRNCTRLSTA_DIAG_OFFSET, in e1000_gig_downshift_workaround_ich8lan()
5657 if (ret_val) in e1000_gig_downshift_workaround_ich8lan()
5660 ret_val = e1000_write_kmrn_reg_generic(hw, in e1000_gig_downshift_workaround_ich8lan()
5663 if (ret_val) in e1000_gig_downshift_workaround_ich8lan()
5688 s32 ret_val; in e1000_suspend_workarounds_ich8lan() local
5709 ret_val = hw->phy.ops.acquire(hw); in e1000_suspend_workarounds_ich8lan()
5710 if (ret_val) in e1000_suspend_workarounds_ich8lan()
5716 ret_val = in e1000_suspend_workarounds_ich8lan()
5720 if (ret_val) in e1000_suspend_workarounds_ich8lan()
5798 ret_val = hw->phy.ops.acquire(hw); in e1000_suspend_workarounds_ich8lan()
5799 if (ret_val) in e1000_suspend_workarounds_ich8lan()
5820 s32 ret_val; in e1000_resume_workarounds_pchlan() local
5826 ret_val = e1000_init_phy_workarounds_pchlan(hw); in e1000_resume_workarounds_pchlan()
5827 if (ret_val) { in e1000_resume_workarounds_pchlan()
5828 DEBUGOUT1("Failed to init PHY flow ret_val=%d\n", ret_val); in e1000_resume_workarounds_pchlan()
5829 return ret_val; in e1000_resume_workarounds_pchlan()
5840 ret_val = hw->phy.ops.acquire(hw); in e1000_resume_workarounds_pchlan()
5841 if (ret_val) { in e1000_resume_workarounds_pchlan()
5843 return ret_val; in e1000_resume_workarounds_pchlan()
5856 ret_val = hw->phy.ops.read_reg_locked(hw, I217_MEMPWR, in e1000_resume_workarounds_pchlan()
5858 if (ret_val) in e1000_resume_workarounds_pchlan()
5867 ret_val = hw->phy.ops.read_reg_locked(hw, I217_CGFREG, in e1000_resume_workarounds_pchlan()
5869 if (ret_val) in e1000_resume_workarounds_pchlan()
5874 if (ret_val) in e1000_resume_workarounds_pchlan()
5875 DEBUGOUT1("Error %d in resume workarounds\n", ret_val); in e1000_resume_workarounds_pchlan()
5877 return ret_val; in e1000_resume_workarounds_pchlan()
6042 s32 ret_val = E1000_SUCCESS; in e1000_get_cfg_done_ich8lan() local
6054 ret_val = e1000_get_auto_rd_done_generic(hw); in e1000_get_cfg_done_ich8lan()
6055 if (ret_val) { in e1000_get_cfg_done_ich8lan()
6061 ret_val = E1000_SUCCESS; in e1000_get_cfg_done_ich8lan()
6082 ret_val = -E1000_ERR_CONFIG; in e1000_get_cfg_done_ich8lan()
6086 return ret_val; in e1000_get_cfg_done_ich8lan()
6116 s32 ret_val; in e1000_clear_hw_cntrs_ich8lan() local
6141 ret_val = hw->phy.ops.acquire(hw); in e1000_clear_hw_cntrs_ich8lan()
6142 if (ret_val) in e1000_clear_hw_cntrs_ich8lan()
6144 ret_val = hw->phy.ops.set_page(hw, in e1000_clear_hw_cntrs_ich8lan()
6146 if (ret_val) in e1000_clear_hw_cntrs_ich8lan()