Lines Matching refs:regs

938 	pci_regspec_t *regs;  in pci_resource_setup()  local
1024 "available", (caddr_t)&regs, &rlen) == DDI_SUCCESS) { in pci_resource_setup()
1038 switch (PCI_REG_ADDR_G(regs[i].pci_phys_hi)) { in pci_resource_setup()
1041 (uint64_t)regs[i].pci_phys_low, in pci_resource_setup()
1042 (uint64_t)regs[i].pci_size_low, in pci_resource_setup()
1043 (regs[i].pci_phys_hi & PCI_REG_PF_M) ? in pci_resource_setup()
1050 ((uint64_t)(regs[i].pci_phys_mid) << 32) | in pci_resource_setup()
1051 ((uint64_t)(regs[i].pci_phys_low)), in pci_resource_setup()
1052 ((uint64_t)(regs[i].pci_size_hi) << 32) | in pci_resource_setup()
1053 ((uint64_t)(regs[i].pci_size_low)), in pci_resource_setup()
1054 (regs[i].pci_phys_hi & PCI_REG_PF_M) ? in pci_resource_setup()
1061 (uint64_t)regs[i].pci_phys_low, in pci_resource_setup()
1062 (uint64_t)regs[i].pci_size_low, in pci_resource_setup()
1071 PCI_REG_ADDR_G(regs[i].pci_phys_hi)); in pci_resource_setup()
1075 kmem_free(regs, rlen); in pci_resource_setup()
1323 pci_regspec_t *regs, *newregs; in pci_get_available_prop() local
1341 "available", (caddr_t)&regs, &rlen); in pci_get_available_prop()
1356 if (type == (regs[i].pci_phys_hi & PCI_ADDR_TYPE_MASK)) { in pci_get_available_prop()
1359 range_base = ((uint64_t)(regs[i].pci_phys_mid) << 32) | in pci_get_available_prop()
1360 ((uint64_t)(regs[i].pci_phys_low)); in pci_get_available_prop()
1361 range_len = ((uint64_t)(regs[i].pci_size_hi) << 32) | in pci_get_available_prop()
1362 ((uint64_t)(regs[i].pci_size_low)); in pci_get_available_prop()
1386 newregs[j].pci_phys_hi = regs[i].pci_phys_hi; in pci_get_available_prop()
1398 newregs[j].pci_phys_hi = regs[i].pci_phys_hi; in pci_get_available_prop()
1415 newregs[j] = regs[k]; in pci_get_available_prop()
1423 newregs[j] = regs[i]; in pci_get_available_prop()
1439 kmem_free(regs, rlen); in pci_get_available_prop()
1462 kmem_free(regs, rlen); in pci_get_available_prop()
1474 pci_regspec_t *regs, *newregs; in pci_put_available_prop() local
1493 "available", (caddr_t)&regs, &rlen); in pci_put_available_prop()
1518 if (type == (regs[i].pci_phys_hi & PCI_ADDR_TYPE_MASK)) { in pci_put_available_prop()
1521 range_base = ((uint64_t)(regs[i].pci_phys_mid) << 32) | in pci_put_available_prop()
1522 ((uint64_t)(regs[i].pci_phys_low)); in pci_put_available_prop()
1523 range_len = ((uint64_t)(regs[i].pci_size_hi) << 32) | in pci_put_available_prop()
1524 ((uint64_t)(regs[i].pci_size_low)); in pci_put_available_prop()
1600 newregs[j].pci_phys_hi = regs[i].pci_phys_hi; in pci_put_available_prop()
1614 newregs[k].pci_phys_hi = regs[i].pci_phys_hi; in pci_put_available_prop()
1625 newregs[j] = regs[i]; in pci_put_available_prop()
1654 kmem_free(regs, rlen); in pci_put_available_prop()
1683 kmem_free(regs, rlen); in pci_put_available_prop()