Lines Matching refs:xa
180 {OP_IF_MODE_AND, 1, 0xa}, /* fpga+e2 */
489 {OP_IF_MODE_AND, 2, 0xa}, /* fpga+e2 */
1167 {OP_ZR, 0x50240, 0xa},
1215 {OP_IF_MODE_AND, 1, 0xa}, /* fpga+e2 */
1270 {OP_IF_MODE_AND, 1, 0xa}, /* fpga+e2 */
1314 {OP_IF_MODE_AND, 2, 0xa}, /* fpga+e2 */
1552 {OP_IF_MODE_AND, 1, 0xa}, /* fpga+e2 */
1590 {OP_IF_MODE_AND, 2, 0xa}, /* fpga+e2 */
1869 {OP_IF_MODE_AND, 1, 0xa}, /* fpga+e2 */
1911 {OP_IF_MODE_AND, 2, 0xa}, /* fpga+e2 */