Lines Matching refs:wb_data
71 #define REG_WR_DMAE(cb, offset, wb_data, len) \ argument
72 elink_cb_reg_wb_write(cb, offset, wb_data, len)
73 #define REG_RD_DMAE(cb, offset, wb_data, len) \ argument
74 elink_cb_reg_wb_read(cb, offset, wb_data, len)
2184 u32 wb_data[2]; in elink_update_pfc_bmac1() local
2195 wb_data[0] = val; in elink_update_pfc_bmac1()
2196 wb_data[1] = 0; in elink_update_pfc_bmac1()
2197 REG_WR_DMAE(cb, bmac_addr + BIGMAC_REGISTER_RX_CONTROL, wb_data, 2); in elink_update_pfc_bmac1()
2205 wb_data[0] = val; in elink_update_pfc_bmac1()
2206 wb_data[1] = 0; in elink_update_pfc_bmac1()
2207 REG_WR_DMAE(cb, bmac_addr + BIGMAC_REGISTER_TX_CONTROL, wb_data, 2); in elink_update_pfc_bmac1()
2219 u32 wb_data[2]; in elink_update_pfc_bmac2() local
2230 wb_data[0] = val; in elink_update_pfc_bmac2()
2231 wb_data[1] = 0; in elink_update_pfc_bmac2()
2232 REG_WR_DMAE(cb, bmac_addr + BIGMAC2_REGISTER_RX_CONTROL, wb_data, 2); in elink_update_pfc_bmac2()
2241 wb_data[0] = val; in elink_update_pfc_bmac2()
2242 wb_data[1] = 0; in elink_update_pfc_bmac2()
2243 REG_WR_DMAE(cb, bmac_addr + BIGMAC2_REGISTER_TX_CONTROL, wb_data, 2); in elink_update_pfc_bmac2()
2248 wb_data[0] = 0x0; in elink_update_pfc_bmac2()
2249 wb_data[0] |= (1<<0); /* RX */ in elink_update_pfc_bmac2()
2250 wb_data[0] |= (1<<1); /* TX */ in elink_update_pfc_bmac2()
2251 wb_data[0] |= (1<<2); /* Force initial Xon */ in elink_update_pfc_bmac2()
2252 wb_data[0] |= (1<<3); /* 8 cos */ in elink_update_pfc_bmac2()
2253 wb_data[0] |= (1<<5); /* STATS */ in elink_update_pfc_bmac2()
2254 wb_data[1] = 0; in elink_update_pfc_bmac2()
2256 wb_data, 2); in elink_update_pfc_bmac2()
2258 wb_data[0] &= ~(1<<2); in elink_update_pfc_bmac2()
2262 wb_data[0] = 0x8; in elink_update_pfc_bmac2()
2263 wb_data[1] = 0; in elink_update_pfc_bmac2()
2266 REG_WR_DMAE(cb, bmac_addr + BIGMAC2_REGISTER_PFC_CONTROL, wb_data, 2); in elink_update_pfc_bmac2()
2277 wb_data[0] = val; in elink_update_pfc_bmac2()
2278 wb_data[1] = 0; in elink_update_pfc_bmac2()
2280 wb_data, 2); in elink_update_pfc_bmac2()
2292 wb_data[0] = val; in elink_update_pfc_bmac2()
2293 wb_data[1] = 0; in elink_update_pfc_bmac2()
2294 REG_WR_DMAE(cb, bmac_addr + BIGMAC2_REGISTER_BMAC_CONTROL, wb_data, 2); in elink_update_pfc_bmac2()
2520 u32 wb_data[2]; in elink_bmac1_enable() local
2526 wb_data[0] = 0x3c; in elink_bmac1_enable()
2527 wb_data[1] = 0; in elink_bmac1_enable()
2529 wb_data, 2); in elink_bmac1_enable()
2532 wb_data[0] = ((params->mac_addr[2] << 24) | in elink_bmac1_enable()
2536 wb_data[1] = ((params->mac_addr[0] << 8) | in elink_bmac1_enable()
2538 REG_WR_DMAE(cb, bmac_addr + BIGMAC_REGISTER_TX_SOURCE_ADDR, wb_data, 2); in elink_bmac1_enable()
2546 wb_data[0] = val; in elink_bmac1_enable()
2547 wb_data[1] = 0; in elink_bmac1_enable()
2548 REG_WR_DMAE(cb, bmac_addr + BIGMAC_REGISTER_BMAC_CONTROL, wb_data, 2); in elink_bmac1_enable()
2551 wb_data[0] = ELINK_ETH_MAX_JUMBO_PACKET_SIZE + ELINK_ETH_OVREHEAD; in elink_bmac1_enable()
2552 wb_data[1] = 0; in elink_bmac1_enable()
2553 REG_WR_DMAE(cb, bmac_addr + BIGMAC_REGISTER_RX_MAX_SIZE, wb_data, 2); in elink_bmac1_enable()
2558 wb_data[0] = ELINK_ETH_MAX_JUMBO_PACKET_SIZE + ELINK_ETH_OVREHEAD; in elink_bmac1_enable()
2559 wb_data[1] = 0; in elink_bmac1_enable()
2560 REG_WR_DMAE(cb, bmac_addr + BIGMAC_REGISTER_TX_MAX_SIZE, wb_data, 2); in elink_bmac1_enable()
2563 wb_data[0] = ELINK_ETH_MAX_JUMBO_PACKET_SIZE + ELINK_ETH_OVREHEAD; in elink_bmac1_enable()
2564 wb_data[1] = 0; in elink_bmac1_enable()
2565 REG_WR_DMAE(cb, bmac_addr + BIGMAC_REGISTER_CNT_MAX_SIZE, wb_data, 2); in elink_bmac1_enable()
2568 wb_data[0] = 0x1000200; in elink_bmac1_enable()
2569 wb_data[1] = 0; in elink_bmac1_enable()
2571 wb_data, 2); in elink_bmac1_enable()
2575 wb_data[0] = 0xf000; in elink_bmac1_enable()
2576 wb_data[1] = 0; in elink_bmac1_enable()
2578 wb_data, 2); in elink_bmac1_enable()
2595 u32 wb_data[2]; in elink_bmac2_enable() local
2599 wb_data[0] = 0; in elink_bmac2_enable()
2600 wb_data[1] = 0; in elink_bmac2_enable()
2601 REG_WR_DMAE(cb, bmac_addr + BIGMAC2_REGISTER_BMAC_CONTROL, wb_data, 2); in elink_bmac2_enable()
2605 wb_data[0] = 0x3c; in elink_bmac2_enable()
2606 wb_data[1] = 0; in elink_bmac2_enable()
2608 wb_data, 2); in elink_bmac2_enable()
2613 wb_data[0] = ((params->mac_addr[2] << 24) | in elink_bmac2_enable()
2617 wb_data[1] = ((params->mac_addr[0] << 8) | in elink_bmac2_enable()
2620 wb_data, 2); in elink_bmac2_enable()
2625 wb_data[0] = 0x1000200; in elink_bmac2_enable()
2626 wb_data[1] = 0; in elink_bmac2_enable()
2628 wb_data, 2); in elink_bmac2_enable()
2632 wb_data[0] = ELINK_ETH_MAX_JUMBO_PACKET_SIZE + ELINK_ETH_OVREHEAD; in elink_bmac2_enable()
2633 wb_data[1] = 0; in elink_bmac2_enable()
2634 REG_WR_DMAE(cb, bmac_addr + BIGMAC2_REGISTER_RX_MAX_SIZE, wb_data, 2); in elink_bmac2_enable()
2638 wb_data[0] = ELINK_ETH_MAX_JUMBO_PACKET_SIZE + ELINK_ETH_OVREHEAD; in elink_bmac2_enable()
2639 wb_data[1] = 0; in elink_bmac2_enable()
2640 REG_WR_DMAE(cb, bmac_addr + BIGMAC2_REGISTER_TX_MAX_SIZE, wb_data, 2); in elink_bmac2_enable()
2643 wb_data[0] = ELINK_ETH_MAX_JUMBO_PACKET_SIZE + ELINK_ETH_OVREHEAD - 2; in elink_bmac2_enable()
2644 wb_data[1] = 0; in elink_bmac2_enable()
2645 REG_WR_DMAE(cb, bmac_addr + BIGMAC2_REGISTER_CNT_MAX_SIZE, wb_data, 2); in elink_bmac2_enable()
2713 u32 wb_data[2]; in elink_set_bmac_rx() local
2725 REG_RD_DMAE(cb, bmac_addr, wb_data, 2); in elink_set_bmac_rx()
2727 wb_data[0] |= ELINK_BMAC_CONTROL_RX_ENABLE; in elink_set_bmac_rx()
2729 wb_data[0] &= ~ELINK_BMAC_CONTROL_RX_ENABLE; in elink_set_bmac_rx()
2730 REG_WR_DMAE(cb, bmac_addr, wb_data, 2); in elink_set_bmac_rx()
15169 u32 wb_data[2]; in elink_check_half_open_conn() local
15178 REG_RD_DMAE(cb, mac_base + lss_status_reg, wb_data, 2); in elink_check_half_open_conn()
15179 lss_status = (wb_data[0] > 0); in elink_check_half_open_conn()