Lines Matching defs:summary

6 	"summary": "Retired SSE/AVX FLOPs",  string
34 "summary": "Retired Serializing Ops", string
62 "summary": "FP Dispatch Faults", string
90 "summary": "Bad Status 2", string
102 "summary": "Retired Lock Instructions", string
114 "summary": "Retired CLFLUSH Instructions", string
121 "summary": "Retired CPUID Instructions", string
128 "summary": "LS Dispatch", string
152 "summary": "SMIs Received", string
159 "summary": "Interrupts Taken", string
166 "summary": "Store to Load Forward", string
173 "summary": "Store Commit Cancels 2", string
185 "summary": "LS MAB Allocates by Type", string
203 "summary": "Demand Data Cache Fills by Data Source", string
241 "summary": "Any Data Cache Fills by Data Source", string
279 "summary": "L1 DTLB Misses", string
321 "summary": "Misaligned loads", string
338 "summary": "Prefetch Instructions Dispatched", string
361 "summary": "Ineffective Software Prefetches", string
379 "summary": "Software Prefetch Data Cache Fills", string
417 "summary": "Hardware Prefetch Data Cache Fills", string
455 "summary": "Count of Allocated Mabs", string
462 "summary": "Cycles not in Halt" string
468 "summary": "All TLB Flushes", string
484 "summary": "Instruction Cache Refills from L2", string
491 "summary": "Instruction Cache Refills from System", string
498 "summary": "L1 ITLB Miss, L2 ITLB Hit", string
505 "summary": "ITLB Reload from Page-Table walk", string
533 "summary": "L2 Branch Prediction Overrides Existing Prediction (speculative)" string
539 "summary": "Dynamic Indirect Predictions", string
546 "summary": "Decode Redirects", string
553 "summary": "L1 TLB Hits for Instruction Fetch", string
576 "summary": "IC Tag Hit/Miss Events", string
595 "summary": "Op Cache Hit/Miss", string
613 "summary": "Source of Op Dispatched From Decoder", string
631 "summary": "Types of Oops Dispatched From Decoder", string
653 "summary": "Dispatch Resource Stall Cycles 1", string
696 "summary": "Dynamic Tokens Dispatch Stall Cycles 2", string
729 "summary": "Retired Instructions", string
736 "summary": "Retired Ops", string
743 "summary": "Retired Branch Instructions", string
750 "summary": "Retired Branch Instructions Mispredicted", string
757 "summary": "Retired Taken Branch Instructions", string
764 "summary": "Retired Taken Branch Instructions Mispredicted", string
771 "summary": "Retired Far Control Transfers", string
778 "summary": "Retired Near Returns", string
785 "summary": "Retired Near Returns Mispredicted", string
792 "summary": "Retired Indirect Branch Instructions Mispredicted", string
799 "summary": "Retired MMX/FP Instructions", string
822 "summary": "Retired Indirect Branch Instructions", string
829 "summary": "Retired Conditional Branch Instructions" string
835 "summary": "Div Cycles Busy count" string
841 "summary": "Div Op Count" string
847 "summary": "Retired Mispredicted Branch Instructions due to Direction Mismatch", string
854 "summary": "Tagged IBS Ops", string
877 "summary": "Retired Fused Instructions", string
884 "summary": "Requests to L2 Group1", string
927 "summary": "Core to L2 Cacheable Request Access Status", string
975 "summary": "L2 Prefetch Hit in L2" string
981 "summary": "L2 Prefetcher Hits in L3", string
988 "summary": "L2 Prefetcher Misses in L3", string