Lines Matching defs:summary

6 	"summary": "FPU Pipe Assignment",  string
54 "summary": "FP Scheduler Empty", string
61 "summary": "Retired x87 Floating Point Operations", string
85 "summary": "Retired SSE/AVX Operations", string
134 "summary": "Number of Move Elimination and Scalar Op Optimization", string
162 "summary": "Retired Serializing Ops", string
190 "summary": "Bad Status 2", string
213 "summary": "Locks", string
237 "summary": "Retired CLFLUSH Instructions", string
244 "summary": "Retired CPUID Instructions", string
251 "summary": "LS Dispatch", string
273 "summary": "SMIs Received", string
280 "summary": "Store to Load Forward", string
287 "summary": "Store Commit Cancels 2", string
299 "summary": "Data Cache Accesses", string
306 "summary": "Data Cache Refills from System", string
339 "summary": "L1 DTLB Miss", string
378 "summary": "Tablewalker allocation", string
401 "summary": "Misaligned loads" string
407 "summary": "Prefetch Instructions Dispatched", string
428 "summary": "Ineffective Software Prefetchs", string
446 "summary": "Software Prefetch Data Cache Fills", string
479 "summary": "Hardware Prefetch Data Cache Fills", string
512 "summary": "Table Walker Data Cache Fills by Data Source", string
544 "summary": "Cycles not in Halt" string
550 "summary": "32 Byte Instruction Cache Fetch", string
557 "summary": "32 Byte Instruction Cache Misses", string
564 "summary": "Instruction Cache Refills from L2", string
571 "summary": "Instruction Cache Refills from System", string
578 "summary": "L1 ITLB Miss, L2 ITLB Hit", string
585 "summary": "L1 ITLB Miss, L2 ITLB Miss", string
592 "summary": "Instruction Pipe Stall", string
614 "summary": "L1 BTB Correction" string
620 "summary": "L2 BTB Correction" string
626 "summary": "Instruction Cache Lines Invalidated", string
644 "summary": "ITLB Reloads", string
651 "summary": "OC Mode Switch", string
668 "summary": "Dynamic Tokens Dispatch Stall Cycles 0", string
710 "summary": "Retired Instructions" string
716 "summary": "Retired Uops", string
723 "summary": "Retired Branch Instructions", string
730 "summary": "Retired Branch Instructions Mispredicted", string
737 "summary": "Retired Taken Branch Instructions", string
744 "summary": "Retired Taken Branch Instructions Mispredicted", string
751 "summary": "Retired Far Control Transfers", string
758 "summary": "Retired Branch Resyncs", string
765 "summary": "Retired Near Returns", string
772 "summary": "Retired Near Returns Mispredicted", string
779 "summary": "Retired Indirect Branch Instructions Mispredicted" string
785 "summary": "Retired MMXTM/FP Instructions", string
808 "summary": "Retired Conditional Branch Instructions" string
814 "summary": "Div Cycles Busy count" string
820 "summary": "Div Op Count" string
826 "summary": "Tagged IBS Ops", string
847 "summary": "Retired Fused Branch Instructions", string
854 "summary": "Requests to L2 Group1", string
894 "summary": "Requests to L2 Group2", string
937 "summary": "L2 Latency", string
949 "summary": "LS to L2 WBC requests", string
987 "summary": "Core to L2 Cacheable Request Access Status", string
1035 "summary": "Cycles with fill pending from L2", string