History log of /freebsd-head/sys/arm64/coresight/coresight.c
Revision Date Author Comments
8ce15a8c3559bdd52ae005718214d0274e87db23 17-Jun-2020 br <br@FreeBSD.org> Complete the ACPI support for ARM Coresight:
o Parse the ACPI DSD (Device Specific Data) graph property and record
device connections.
o Split-out FDT support to a separate file.
o Get the corresponding (FDT/ACPI) Coresight platform data in
the device drivers.

Sponsored by: DARPA, AFRL
c8c25848151c4e087438b40e02959716bb7d70b9 09-Jun-2020 br <br@FreeBSD.org> Fix style: wrap long lines.

Sponsored by: DARPA, AFRL
250e158ddf52459661439141407bca505d199c19 20-May-2019 cem <cem@FreeBSD.org> Extract eventfilter declarations to sys/_eventfilter.h

This allows replacing "sys/eventfilter.h" includes with "sys/_eventfilter.h"
in other header files (e.g., sys/{bus,conf,cpu}.h) and reduces header
pollution substantially.

files into appropriate headers (e.g., sys/proc.h, powernv/opal.h).

As a side effect of reduced header pollution, many .c files and headers no
longer contain needed definitions. The remainder of the patch addresses
adding appropriate includes to fix those files.

LOCK_DEBUG and LOCK_FILE_LINE_ARG are moved to sys/_lock.h, as required by
sys/mutex.h since r326106 (but silently protected by header pollution prior
to this change).

No functional change (intended). Of course, any out of tree modules that
relied on header pollution for sys/eventhandler.h, sys/lock.h, or
sys/mutex.h inclusion need to be fixed. __FreeBSD_version has been bumped.
38bf332628ce405e2c495df0145ad5dcc9783dd4 08-Apr-2018 gonzo <gonzo@FreeBSD.org> Fix one more OF_getprop_alloc instance missed in r332310

X-MFC-With: r332310
7d671d9b44b0b2e9671d6cda2f350eae2dbaee9d 05-Apr-2018 br <br@FreeBSD.org> Add support for the Coresight technology from ARM Ltd.

ARM Coresight is a solution for debug and trace of complex SoC designs.

This includes a collection of drivers for ARM Coresight interconnect
devices within a small Coresight framework.

Supported devices are:
o Embedded Trace Macrocell v4 (ETMv4)
o Funnel
o Dynamic Replicator
o Trace Memory Controller (TMC)
o CPU debug module

Devices are connected to each other internally in SoC and the
configuration of each device endpoints is described in FDT.

Typical trace flow (as found on Qualcomm Snapdragon 410e):
CPU0 -> ETM0 -> funnel1 -> funnel0 -> ETF -> replicator -> ETR -> DRAM
CPU1 -> ETM1 -^
CPU2 -> ETM2 -^
CPU3 -> ETM3 -^

Note that both Embedded Trace FIFO (ETF) and Embedded Trace Router (ETR)
are hardware configurations of TMC.

This is required for upcoming HWPMC tracing support.

This is tested on single-core system only.

Reviewed by: andrew (partially)
Sponsored by: DARPA, AFRL
Differential Revision: https://reviews.freebsd.org/D14618